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bf985969e2
MXS-based SoCs implements iomux functions in block PINCTRL. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
166 lines
4.9 KiB
C
166 lines
4.9 KiB
C
/*
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* Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
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* <armlinux@phytec.de>
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* Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#ifndef __MACH_MXS_IOMUX_H__
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#define __MACH_MXS_IOMUX_H__
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/*
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* IOMUX/PAD Bit field definitions
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*
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* PAD_BANK: 0..2 (3)
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* PAD_PIN: 3..7 (5)
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* PAD_MUXSEL: 8..9 (2)
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* PAD_MA: 10..11 (2)
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* PAD_MA_VALID: 12 (1)
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* PAD_VOL: 13 (1)
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* PAD_VOL_VALID: 14 (1)
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* PAD_PULL: 15 (1)
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* PAD_PULL_VALID: 16 (1)
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* RESERVED: 17..31 (15)
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*/
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typedef u32 iomux_cfg_t;
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#define MXS_PAD_BANK_SHIFT 0
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#define MXS_PAD_BANK_MASK ((iomux_cfg_t)0x7 << MXS_PAD_BANK_SHIFT)
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#define MXS_PAD_PIN_SHIFT 3
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#define MXS_PAD_PIN_MASK ((iomux_cfg_t)0x1f << MXS_PAD_PIN_SHIFT)
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#define MXS_PAD_MUXSEL_SHIFT 8
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#define MXS_PAD_MUXSEL_MASK ((iomux_cfg_t)0x3 << MXS_PAD_MUXSEL_SHIFT)
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#define MXS_PAD_MA_SHIFT 10
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#define MXS_PAD_MA_MASK ((iomux_cfg_t)0x3 << MXS_PAD_MA_SHIFT)
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#define MXS_PAD_MA_VALID_SHIFT 12
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#define MXS_PAD_MA_VALID_MASK ((iomux_cfg_t)0x1 << MXS_PAD_MA_VALID_SHIFT)
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#define MXS_PAD_VOL_SHIFT 13
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#define MXS_PAD_VOL_MASK ((iomux_cfg_t)0x1 << MXS_PAD_VOL_SHIFT)
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#define MXS_PAD_VOL_VALID_SHIFT 14
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#define MXS_PAD_VOL_VALID_MASK ((iomux_cfg_t)0x1 << MXS_PAD_VOL_VALID_SHIFT)
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#define MXS_PAD_PULL_SHIFT 15
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#define MXS_PAD_PULL_MASK ((iomux_cfg_t)0x1 << MXS_PAD_PULL_SHIFT)
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#define MXS_PAD_PULL_VALID_SHIFT 16
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#define MXS_PAD_PULL_VALID_MASK ((iomux_cfg_t)0x1 << MXS_PAD_PULL_VALID_SHIFT)
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#define PAD_MUXSEL_0 0
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#define PAD_MUXSEL_1 1
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#define PAD_MUXSEL_2 2
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#define PAD_MUXSEL_GPIO 3
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#define PAD_4MA 0
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#define PAD_8MA 1
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#define PAD_12MA 2
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#define PAD_16MA 3
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#define PAD_1V8 0
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#define PAD_3V3 1
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#define PAD_NOPULL 0
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#define PAD_PULLUP 1
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#define MXS_PAD_4MA ((PAD_4MA << MXS_PAD_MA_SHIFT) | \
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MXS_PAD_MA_VALID_MASK)
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#define MXS_PAD_8MA ((PAD_8MA << MXS_PAD_MA_SHIFT) | \
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MXS_PAD_MA_VALID_MASK)
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#define MXS_PAD_12MA ((PAD_12MA << MXS_PAD_MA_SHIFT) | \
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MXS_PAD_MA_VALID_MASK)
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#define MXS_PAD_16MA ((PAD_16MA << MXS_PAD_MA_SHIFT) | \
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MXS_PAD_MA_VALID_MASK)
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#define MXS_PAD_1V8 ((PAD_1V8 << MXS_PAD_VOL_SHIFT) | \
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MXS_PAD_VOL_VALID_MASK)
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#define MXS_PAD_3V3 ((PAD_3V3 << MXS_PAD_VOL_SHIFT) | \
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MXS_PAD_VOL_VALID_MASK)
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#define MXS_PAD_NOPULL ((PAD_NOPULL << MXS_PAD_PULL_SHIFT) | \
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MXS_PAD_PULL_VALID_MASK)
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#define MXS_PAD_PULLUP ((PAD_PULLUP << MXS_PAD_PULL_SHIFT) | \
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MXS_PAD_PULL_VALID_MASK)
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#define MXS_IOMUX_PAD(_bank, _pin, _muxsel, _ma, _vol, _pull) \
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(((iomux_cfg_t)(_bank) << MXS_PAD_BANK_SHIFT) | \
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((iomux_cfg_t)(_pin) << MXS_PAD_PIN_SHIFT) | \
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((iomux_cfg_t)(_muxsel) << MXS_PAD_MUXSEL_SHIFT) | \
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((iomux_cfg_t)(_ma) << MXS_PAD_MA_SHIFT) | \
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((iomux_cfg_t)(_vol) << MXS_PAD_VOL_SHIFT) | \
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((iomux_cfg_t)(_pull) << MXS_PAD_PULL_SHIFT))
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/*
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* A pad becomes naked, when none of mA, vol or pull
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* validity bits is set.
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*/
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#define MXS_IOMUX_PAD_NAKED(_bank, _pin, _muxsel) \
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MXS_IOMUX_PAD(_bank, _pin, _muxsel, 0, 0, 0)
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static inline unsigned int PAD_BANK(iomux_cfg_t pad)
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{
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return (pad & MXS_PAD_BANK_MASK) >> MXS_PAD_BANK_SHIFT;
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}
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static inline unsigned int PAD_PIN(iomux_cfg_t pad)
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{
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return (pad & MXS_PAD_PIN_MASK) >> MXS_PAD_PIN_SHIFT;
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}
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static inline unsigned int PAD_MUXSEL(iomux_cfg_t pad)
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{
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return (pad & MXS_PAD_MUXSEL_MASK) >> MXS_PAD_MUXSEL_SHIFT;
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}
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static inline unsigned int PAD_MA(iomux_cfg_t pad)
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{
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return (pad & MXS_PAD_MA_MASK) >> MXS_PAD_MA_SHIFT;
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}
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static inline unsigned int PAD_MA_VALID(iomux_cfg_t pad)
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{
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return (pad & MXS_PAD_MA_VALID_MASK) >> MXS_PAD_MA_VALID_SHIFT;
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}
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static inline unsigned int PAD_VOL(iomux_cfg_t pad)
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{
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return (pad & MXS_PAD_VOL_MASK) >> MXS_PAD_VOL_SHIFT;
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}
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static inline unsigned int PAD_VOL_VALID(iomux_cfg_t pad)
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{
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return (pad & MXS_PAD_VOL_VALID_MASK) >> MXS_PAD_VOL_VALID_SHIFT;
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}
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static inline unsigned int PAD_PULL(iomux_cfg_t pad)
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{
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return (pad & MXS_PAD_PULL_MASK) >> MXS_PAD_PULL_SHIFT;
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}
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static inline unsigned int PAD_PULL_VALID(iomux_cfg_t pad)
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{
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return (pad & MXS_PAD_PULL_VALID_MASK) >> MXS_PAD_PULL_VALID_SHIFT;
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}
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/*
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* configures a single pad in the iomuxer
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*/
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int mxs_iomux_setup_pad(iomux_cfg_t pad);
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/*
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* configures multiple pads
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* convenient way to call the above function with tables
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*/
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int mxs_iomux_setup_multiple_pads(const iomux_cfg_t *pad_list, unsigned count);
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#endif /* __MACH_MXS_IOMUX_H__*/
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