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551adc6057
Harry reported, that he's able to trigger a system freeze with cpu hot
unplug. The freeze turned out to be a live lock caused by recent changes in
irq_force_complete_move().
When fixup_irqs() and from there irq_force_complete_move() is called on the
dying cpu, then all other cpus are in stop machine an wait for the dying cpu
to complete the teardown. If there is a move of an interrupt pending then
irq_force_complete_move() sends the cleanup IPI to the cpus in the old_domain
mask and waits for them to clear the mask. That's obviously impossible as
those cpus are firmly stuck in stop machine with interrupts disabled.
I should have known that, but I completely overlooked it being concentrated on
the locking issues around the vectors. And the existance of the call to
__irq_complete_move() in the code, which actually sends the cleanup IPI made
it reasonable to wait for that cleanup to complete. That call was bogus even
before the recent changes as it was just a pointless distraction.
We have to look at two cases:
1) The move_in_progress flag of the interrupt is set
This means the ioapic has been updated with the new vector, but it has not
fired yet. In theory there is a race:
set_ioapic(new_vector) <-- Interrupt is raised before update is effective,
i.e. it's raised on the old vector.
So if the target cpu cannot handle that interrupt before the old vector is
cleaned up, we get a spurious interrupt and in the worst case the ioapic
irq line becomes stale, but my experiments so far have only resulted in
spurious interrupts.
But in case of cpu hotplug this should be a non issue because if the
affinity update happens right before all cpus rendevouz in stop machine,
there is no way that the interrupt can be blocked on the target cpu because
all cpus loops first with interrupts enabled in stop machine, so the old
vector is not yet cleaned up when the interrupt fires.
So the only way to run into this issue is if the delivery of the interrupt
on the apic/system bus would be delayed beyond the point where the target
cpu disables interrupts in stop machine. I doubt that it can happen, but at
least there is a theroretical chance. Virtualization might be able to
expose this, but AFAICT the IOAPIC emulation is not as stupid as the real
hardware.
I've spent quite some time over the weekend to enforce that situation,
though I was not able to trigger the delayed case.
2) The move_in_progress flag is not set and the old_domain cpu mask is not
empty.
That means, that an interrupt was delivered after the change and the
cleanup IPI has been sent to the cpus in old_domain, but not all CPUs have
responded to it yet.
In both cases we can assume that the next interrupt will arrive on the new
vector, so we can cleanup the old vectors on the cpus in the old_domain cpu
mask.
Fixes: 98229aa36c "x86/irq: Plug vector cleanup race"
Reported-by: Harry Junior <harryjr@outlook.fr>
Tested-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Joe Lawrence <joe.lawrence@stratus.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Ben Hutchings <ben@decadent.org.uk>
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/alpine.DEB.2.11.1603140931430.3657@nanos
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
186 lines
4.6 KiB
C
186 lines
4.6 KiB
C
#ifndef _ASM_X86_HW_IRQ_H
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#define _ASM_X86_HW_IRQ_H
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/*
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* (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
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*
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* moved some of the old arch/i386/kernel/irq.h to here. VY
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*
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* IRQ/IPI changes taken from work by Thomas Radke
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* <tomsoft@informatik.tu-chemnitz.de>
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*
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* hacked by Andi Kleen for x86-64.
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* unified by tglx
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*/
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#include <asm/irq_vectors.h>
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#ifndef __ASSEMBLY__
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#include <linux/percpu.h>
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#include <linux/profile.h>
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#include <linux/smp.h>
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#include <linux/atomic.h>
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#include <asm/irq.h>
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#include <asm/sections.h>
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/* Interrupt handlers registered during init_IRQ */
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extern asmlinkage void apic_timer_interrupt(void);
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extern asmlinkage void x86_platform_ipi(void);
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extern asmlinkage void kvm_posted_intr_ipi(void);
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extern asmlinkage void kvm_posted_intr_wakeup_ipi(void);
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extern asmlinkage void error_interrupt(void);
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extern asmlinkage void irq_work_interrupt(void);
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extern asmlinkage void spurious_interrupt(void);
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extern asmlinkage void thermal_interrupt(void);
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extern asmlinkage void reschedule_interrupt(void);
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extern asmlinkage void irq_move_cleanup_interrupt(void);
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extern asmlinkage void reboot_interrupt(void);
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extern asmlinkage void threshold_interrupt(void);
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extern asmlinkage void deferred_error_interrupt(void);
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extern asmlinkage void call_function_interrupt(void);
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extern asmlinkage void call_function_single_interrupt(void);
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#ifdef CONFIG_TRACING
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/* Interrupt handlers registered during init_IRQ */
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extern void trace_apic_timer_interrupt(void);
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extern void trace_x86_platform_ipi(void);
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extern void trace_error_interrupt(void);
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extern void trace_irq_work_interrupt(void);
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extern void trace_spurious_interrupt(void);
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extern void trace_thermal_interrupt(void);
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extern void trace_reschedule_interrupt(void);
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extern void trace_threshold_interrupt(void);
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extern void trace_deferred_error_interrupt(void);
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extern void trace_call_function_interrupt(void);
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extern void trace_call_function_single_interrupt(void);
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#define trace_irq_move_cleanup_interrupt irq_move_cleanup_interrupt
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#define trace_reboot_interrupt reboot_interrupt
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#define trace_kvm_posted_intr_ipi kvm_posted_intr_ipi
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#define trace_kvm_posted_intr_wakeup_ipi kvm_posted_intr_wakeup_ipi
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#endif /* CONFIG_TRACING */
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#ifdef CONFIG_X86_LOCAL_APIC
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struct irq_data;
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struct pci_dev;
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struct msi_desc;
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enum irq_alloc_type {
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X86_IRQ_ALLOC_TYPE_IOAPIC = 1,
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X86_IRQ_ALLOC_TYPE_HPET,
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X86_IRQ_ALLOC_TYPE_MSI,
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X86_IRQ_ALLOC_TYPE_MSIX,
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X86_IRQ_ALLOC_TYPE_DMAR,
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X86_IRQ_ALLOC_TYPE_UV,
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};
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struct irq_alloc_info {
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enum irq_alloc_type type;
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u32 flags;
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const struct cpumask *mask; /* CPU mask for vector allocation */
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union {
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int unused;
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#ifdef CONFIG_HPET_TIMER
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struct {
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int hpet_id;
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int hpet_index;
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void *hpet_data;
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};
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#endif
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#ifdef CONFIG_PCI_MSI
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struct {
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struct pci_dev *msi_dev;
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irq_hw_number_t msi_hwirq;
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};
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#endif
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#ifdef CONFIG_X86_IO_APIC
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struct {
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int ioapic_id;
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int ioapic_pin;
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int ioapic_node;
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u32 ioapic_trigger : 1;
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u32 ioapic_polarity : 1;
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u32 ioapic_valid : 1;
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struct IO_APIC_route_entry *ioapic_entry;
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};
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#endif
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#ifdef CONFIG_DMAR_TABLE
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struct {
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int dmar_id;
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void *dmar_data;
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};
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#endif
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#ifdef CONFIG_HT_IRQ
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struct {
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int ht_pos;
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int ht_idx;
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struct pci_dev *ht_dev;
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void *ht_update;
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};
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#endif
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#ifdef CONFIG_X86_UV
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struct {
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int uv_limit;
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int uv_blade;
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unsigned long uv_offset;
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char *uv_name;
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};
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#endif
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#if IS_ENABLED(CONFIG_VMD)
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struct {
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struct msi_desc *desc;
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};
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#endif
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};
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};
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struct irq_cfg {
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unsigned int dest_apicid;
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u8 vector;
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u8 old_vector;
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};
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extern struct irq_cfg *irq_cfg(unsigned int irq);
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extern struct irq_cfg *irqd_cfg(struct irq_data *irq_data);
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extern void lock_vector_lock(void);
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extern void unlock_vector_lock(void);
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extern void setup_vector_irq(int cpu);
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#ifdef CONFIG_SMP
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extern void send_cleanup_vector(struct irq_cfg *);
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extern void irq_complete_move(struct irq_cfg *cfg);
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#else
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static inline void send_cleanup_vector(struct irq_cfg *c) { }
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static inline void irq_complete_move(struct irq_cfg *c) { }
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#endif
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extern void apic_ack_edge(struct irq_data *data);
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#else /* CONFIG_X86_LOCAL_APIC */
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static inline void lock_vector_lock(void) {}
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static inline void unlock_vector_lock(void) {}
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#endif /* CONFIG_X86_LOCAL_APIC */
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/* Statistics */
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extern atomic_t irq_err_count;
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extern atomic_t irq_mis_count;
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extern void elcr_set_level_irq(unsigned int irq);
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extern char irq_entries_start[];
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#ifdef CONFIG_TRACING
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#define trace_irq_entries_start irq_entries_start
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#endif
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#define VECTOR_UNUSED NULL
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#define VECTOR_RETRIGGERED ((void *)~0UL)
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typedef struct irq_desc* vector_irq_t[NR_VECTORS];
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DECLARE_PER_CPU(vector_irq_t, vector_irq);
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#endif /* !ASSEMBLY_ */
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#endif /* _ASM_X86_HW_IRQ_H */
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