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3070033a16
More information about the SEAD-3 platform can be found at <http://www.mips.com/products/development-kits/mips-sead-3/> on MTI's site. Currently, the M14K family of cores is what the SEAD-3 is utilised with. Signed-off-by: Douglas Leung <douglas@mips.com> Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Steven J. Hill <sjhill@mips.com>
139 lines
3.1 KiB
C
139 lines
3.1 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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*/
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#include <linux/bootmem.h>
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#include <asm/bootinfo.h>
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#include <asm/sections.h>
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#include <asm/mips-boards/prom.h>
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enum yamon_memtypes {
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yamon_dontuse,
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yamon_prom,
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yamon_free,
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};
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static struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
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/* determined physical memory size, not overridden by command line args */
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unsigned long physical_memsize = 0L;
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struct prom_pmemblock * __init prom_getmdesc(void)
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{
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char *memsize_str, *ptr;
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unsigned int memsize;
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static char cmdline[COMMAND_LINE_SIZE] __initdata;
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long val;
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int tmp;
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/* otherwise look in the environment */
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memsize_str = prom_getenv("memsize");
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if (!memsize_str) {
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pr_warn("memsize not set in boot prom, set to default 32Mb\n");
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physical_memsize = 0x02000000;
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} else {
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tmp = kstrtol(memsize_str, 0, &val);
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physical_memsize = (unsigned long)val;
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}
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#ifdef CONFIG_CPU_BIG_ENDIAN
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/* SOC-it swaps, or perhaps doesn't swap, when DMA'ing the last
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word of physical memory */
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physical_memsize -= PAGE_SIZE;
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#endif
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/* Check the command line for a memsize directive that overrides
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the physical/default amount */
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strcpy(cmdline, arcs_cmdline);
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ptr = strstr(cmdline, "memsize=");
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if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' '))
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ptr = strstr(ptr, " memsize=");
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if (ptr)
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memsize = memparse(ptr + 8, &ptr);
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else
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memsize = physical_memsize;
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memset(mdesc, 0, sizeof(mdesc));
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mdesc[0].type = yamon_dontuse;
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mdesc[0].base = 0x00000000;
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mdesc[0].size = 0x00001000;
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mdesc[1].type = yamon_prom;
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mdesc[1].base = 0x00001000;
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mdesc[1].size = 0x000ef000;
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/*
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* The area 0x000f0000-0x000fffff is allocated for BIOS memory by the
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* south bridge and PCI access always forwarded to the ISA Bus and
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* BIOSCS# is always generated.
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* This mean that this area can't be used as DMA memory for PCI
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* devices.
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*/
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mdesc[2].type = yamon_dontuse;
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mdesc[2].base = 0x000f0000;
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mdesc[2].size = 0x00010000;
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mdesc[3].type = yamon_dontuse;
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mdesc[3].base = 0x00100000;
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mdesc[3].size = CPHYSADDR(PFN_ALIGN((unsigned long)&_end)) -
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mdesc[3].base;
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mdesc[4].type = yamon_free;
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mdesc[4].base = CPHYSADDR(PFN_ALIGN(&_end));
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mdesc[4].size = memsize - mdesc[4].base;
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return &mdesc[0];
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}
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static int __init prom_memtype_classify(unsigned int type)
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{
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switch (type) {
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case yamon_free:
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return BOOT_MEM_RAM;
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case yamon_prom:
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return BOOT_MEM_ROM_DATA;
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default:
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return BOOT_MEM_RESERVED;
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}
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}
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void __init prom_meminit(void)
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{
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struct prom_pmemblock *p;
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p = prom_getmdesc();
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while (p->size) {
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long type;
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unsigned long base, size;
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type = prom_memtype_classify(p->type);
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base = p->base;
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size = p->size;
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add_memory_region(base, size, type);
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p++;
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}
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}
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void __init prom_free_prom_memory(void)
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{
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unsigned long addr;
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int i;
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for (i = 0; i < boot_mem_map.nr_map; i++) {
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if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
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continue;
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addr = boot_mem_map.map[i].addr;
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free_init_pages("prom memory",
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addr, addr + boot_mem_map.map[i].size);
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}
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}
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