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c2fed9965c
In process and sleep allowed context, favor GFP_KERNEL allocations over GFP_ATOMIC ones. -v2: fixed checkpatch.pl warnings CC: Eric Dumazet <eric.dumazet@gmail.com> CC: Ben Greear <greearb@candelatech.com> CC: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
737 lines
26 KiB
C
737 lines
26 KiB
C
/*******************************************************************************
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Intel PRO/1000 Linux driver
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Copyright(c) 1999 - 2011 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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Linux NICS <linux.nics@intel.com>
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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/* Linux PRO/1000 Ethernet Driver main header file */
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#ifndef _E1000_H_
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#define _E1000_H_
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#include <linux/bitops.h>
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#include <linux/types.h>
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#include <linux/timer.h>
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#include <linux/workqueue.h>
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#include <linux/io.h>
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#include <linux/netdevice.h>
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#include <linux/pci.h>
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#include <linux/pci-aspm.h>
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#include <linux/crc32.h>
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#include <linux/if_vlan.h>
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#include "hw.h"
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struct e1000_info;
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#define e_dbg(format, arg...) \
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netdev_dbg(hw->adapter->netdev, format, ## arg)
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#define e_err(format, arg...) \
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netdev_err(adapter->netdev, format, ## arg)
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#define e_info(format, arg...) \
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netdev_info(adapter->netdev, format, ## arg)
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#define e_warn(format, arg...) \
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netdev_warn(adapter->netdev, format, ## arg)
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#define e_notice(format, arg...) \
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netdev_notice(adapter->netdev, format, ## arg)
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/* Interrupt modes, as used by the IntMode parameter */
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#define E1000E_INT_MODE_LEGACY 0
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#define E1000E_INT_MODE_MSI 1
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#define E1000E_INT_MODE_MSIX 2
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/* Tx/Rx descriptor defines */
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#define E1000_DEFAULT_TXD 256
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#define E1000_MAX_TXD 4096
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#define E1000_MIN_TXD 64
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#define E1000_DEFAULT_RXD 256
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#define E1000_MAX_RXD 4096
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#define E1000_MIN_RXD 64
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#define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */
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#define E1000_MAX_ITR_USECS 10000 /* 100 irq/sec */
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/* Early Receive defines */
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#define E1000_ERT_2048 0x100
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#define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */
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/* How many Tx Descriptors do we need to call netif_wake_queue ? */
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/* How many Rx Buffers do we bundle into one write to the hardware ? */
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#define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */
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#define AUTO_ALL_MODES 0
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#define E1000_EEPROM_APME 0x0400
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#define E1000_MNG_VLAN_NONE (-1)
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/* Number of packet split data buffers (not including the header buffer) */
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#define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1)
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#define DEFAULT_JUMBO 9234
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/* BM/HV Specific Registers */
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#define BM_PORT_CTRL_PAGE 769
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#define PHY_UPPER_SHIFT 21
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#define BM_PHY_REG(page, reg) \
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(((reg) & MAX_PHY_REG_ADDRESS) |\
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(((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\
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(((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
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/* PHY Wakeup Registers and defines */
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#define BM_PORT_GEN_CFG PHY_REG(BM_PORT_CTRL_PAGE, 17)
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#define BM_RCTL PHY_REG(BM_WUC_PAGE, 0)
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#define BM_WUC PHY_REG(BM_WUC_PAGE, 1)
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#define BM_WUFC PHY_REG(BM_WUC_PAGE, 2)
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#define BM_WUS PHY_REG(BM_WUC_PAGE, 3)
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#define BM_RAR_L(_i) (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
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#define BM_RAR_M(_i) (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
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#define BM_RAR_H(_i) (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
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#define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
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#define BM_MTA(_i) (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))
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#define BM_RCTL_UPE 0x0001 /* Unicast Promiscuous Mode */
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#define BM_RCTL_MPE 0x0002 /* Multicast Promiscuous Mode */
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#define BM_RCTL_MO_SHIFT 3 /* Multicast Offset Shift */
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#define BM_RCTL_MO_MASK (3 << 3) /* Multicast Offset Mask */
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#define BM_RCTL_BAM 0x0020 /* Broadcast Accept Mode */
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#define BM_RCTL_PMCF 0x0040 /* Pass MAC Control Frames */
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#define BM_RCTL_RFCE 0x0080 /* Rx Flow Control Enable */
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#define HV_STATS_PAGE 778
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#define HV_SCC_UPPER PHY_REG(HV_STATS_PAGE, 16) /* Single Collision Count */
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#define HV_SCC_LOWER PHY_REG(HV_STATS_PAGE, 17)
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#define HV_ECOL_UPPER PHY_REG(HV_STATS_PAGE, 18) /* Excessive Coll. Count */
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#define HV_ECOL_LOWER PHY_REG(HV_STATS_PAGE, 19)
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#define HV_MCC_UPPER PHY_REG(HV_STATS_PAGE, 20) /* Multiple Coll. Count */
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#define HV_MCC_LOWER PHY_REG(HV_STATS_PAGE, 21)
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#define HV_LATECOL_UPPER PHY_REG(HV_STATS_PAGE, 23) /* Late Collision Count */
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#define HV_LATECOL_LOWER PHY_REG(HV_STATS_PAGE, 24)
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#define HV_COLC_UPPER PHY_REG(HV_STATS_PAGE, 25) /* Collision Count */
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#define HV_COLC_LOWER PHY_REG(HV_STATS_PAGE, 26)
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#define HV_DC_UPPER PHY_REG(HV_STATS_PAGE, 27) /* Defer Count */
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#define HV_DC_LOWER PHY_REG(HV_STATS_PAGE, 28)
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#define HV_TNCRS_UPPER PHY_REG(HV_STATS_PAGE, 29) /* Transmit with no CRS */
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#define HV_TNCRS_LOWER PHY_REG(HV_STATS_PAGE, 30)
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#define E1000_FCRTV_PCH 0x05F40 /* PCH Flow Control Refresh Timer Value */
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/* BM PHY Copper Specific Status */
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#define BM_CS_STATUS 17
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#define BM_CS_STATUS_LINK_UP 0x0400
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#define BM_CS_STATUS_RESOLVED 0x0800
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#define BM_CS_STATUS_SPEED_MASK 0xC000
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#define BM_CS_STATUS_SPEED_1000 0x8000
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/* 82577 Mobile Phy Status Register */
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#define HV_M_STATUS 26
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#define HV_M_STATUS_AUTONEG_COMPLETE 0x1000
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#define HV_M_STATUS_SPEED_MASK 0x0300
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#define HV_M_STATUS_SPEED_1000 0x0200
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#define HV_M_STATUS_LINK_UP 0x0040
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/* Time to wait before putting the device into D3 if there's no link (in ms). */
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#define LINK_TIMEOUT 100
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#define DEFAULT_RDTR 0
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#define DEFAULT_RADV 8
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#define BURST_RDTR 0x20
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#define BURST_RADV 0x20
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/*
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* in the case of WTHRESH, it appears at least the 82571/2 hardware
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* writes back 4 descriptors when WTHRESH=5, and 3 descriptors when
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* WTHRESH=4, and since we want 64 bytes at a time written back, set
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* it to 5
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*/
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#define E1000_TXDCTL_DMA_BURST_ENABLE \
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(E1000_TXDCTL_GRAN | /* set descriptor granularity */ \
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E1000_TXDCTL_COUNT_DESC | \
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(5 << 16) | /* wthresh must be +1 more than desired */\
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(1 << 8) | /* hthresh */ \
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0x1f) /* pthresh */
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#define E1000_RXDCTL_DMA_BURST_ENABLE \
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(0x01000000 | /* set descriptor granularity */ \
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(4 << 16) | /* set writeback threshold */ \
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(4 << 8) | /* set prefetch threshold */ \
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0x20) /* set hthresh */
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#define E1000_TIDV_FPD (1 << 31)
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#define E1000_RDTR_FPD (1 << 31)
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enum e1000_boards {
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board_82571,
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board_82572,
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board_82573,
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board_82574,
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board_82583,
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board_80003es2lan,
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board_ich8lan,
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board_ich9lan,
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board_ich10lan,
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board_pchlan,
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board_pch2lan,
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};
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struct e1000_ps_page {
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struct page *page;
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u64 dma; /* must be u64 - written to hw */
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};
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/*
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* wrappers around a pointer to a socket buffer,
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* so a DMA handle can be stored along with the buffer
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*/
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struct e1000_buffer {
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dma_addr_t dma;
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struct sk_buff *skb;
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union {
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/* Tx */
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struct {
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unsigned long time_stamp;
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u16 length;
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u16 next_to_watch;
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unsigned int segs;
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unsigned int bytecount;
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u16 mapped_as_page;
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};
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/* Rx */
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struct {
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/* arrays of page information for packet split */
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struct e1000_ps_page *ps_pages;
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struct page *page;
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};
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};
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};
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struct e1000_ring {
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void *desc; /* pointer to ring memory */
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dma_addr_t dma; /* phys address of ring */
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unsigned int size; /* length of ring in bytes */
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unsigned int count; /* number of desc. in ring */
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u16 next_to_use;
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u16 next_to_clean;
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u16 head;
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u16 tail;
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/* array of buffer information structs */
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struct e1000_buffer *buffer_info;
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char name[IFNAMSIZ + 5];
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u32 ims_val;
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u32 itr_val;
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u16 itr_register;
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int set_itr;
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struct sk_buff *rx_skb_top;
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};
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/* PHY register snapshot values */
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struct e1000_phy_regs {
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u16 bmcr; /* basic mode control register */
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u16 bmsr; /* basic mode status register */
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u16 advertise; /* auto-negotiation advertisement */
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u16 lpa; /* link partner ability register */
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u16 expansion; /* auto-negotiation expansion reg */
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u16 ctrl1000; /* 1000BASE-T control register */
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u16 stat1000; /* 1000BASE-T status register */
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u16 estatus; /* extended status register */
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};
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/* board specific private data structure */
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struct e1000_adapter {
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struct timer_list watchdog_timer;
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struct timer_list phy_info_timer;
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struct timer_list blink_timer;
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struct work_struct reset_task;
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struct work_struct watchdog_task;
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const struct e1000_info *ei;
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unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
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u32 bd_number;
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u32 rx_buffer_len;
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u16 mng_vlan_id;
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u16 link_speed;
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u16 link_duplex;
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u16 eeprom_vers;
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/* track device up/down/testing state */
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unsigned long state;
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/* Interrupt Throttle Rate */
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u32 itr;
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u32 itr_setting;
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u16 tx_itr;
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u16 rx_itr;
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/*
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* Tx
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*/
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struct e1000_ring *tx_ring /* One per active queue */
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____cacheline_aligned_in_smp;
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struct napi_struct napi;
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unsigned int restart_queue;
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u32 txd_cmd;
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bool detect_tx_hung;
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u8 tx_timeout_factor;
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u32 tx_int_delay;
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u32 tx_abs_int_delay;
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unsigned int total_tx_bytes;
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unsigned int total_tx_packets;
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unsigned int total_rx_bytes;
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unsigned int total_rx_packets;
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/* Tx stats */
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u64 tpt_old;
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u64 colc_old;
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u32 gotc;
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u64 gotc_old;
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u32 tx_timeout_count;
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u32 tx_fifo_head;
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u32 tx_head_addr;
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u32 tx_fifo_size;
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u32 tx_dma_failed;
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/*
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* Rx
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*/
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bool (*clean_rx) (struct e1000_adapter *adapter,
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int *work_done, int work_to_do)
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____cacheline_aligned_in_smp;
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void (*alloc_rx_buf) (struct e1000_adapter *adapter,
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int cleaned_count, gfp_t gfp);
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struct e1000_ring *rx_ring;
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u32 rx_int_delay;
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u32 rx_abs_int_delay;
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/* Rx stats */
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u64 hw_csum_err;
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u64 hw_csum_good;
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u64 rx_hdr_split;
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u32 gorc;
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u64 gorc_old;
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u32 alloc_rx_buff_failed;
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u32 rx_dma_failed;
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unsigned int rx_ps_pages;
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u16 rx_ps_bsize0;
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u32 max_frame_size;
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u32 min_frame_size;
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/* OS defined structs */
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struct net_device *netdev;
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struct pci_dev *pdev;
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/* structs defined in e1000_hw.h */
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struct e1000_hw hw;
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spinlock_t stats64_lock;
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struct e1000_hw_stats stats;
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struct e1000_phy_info phy_info;
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struct e1000_phy_stats phy_stats;
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/* Snapshot of PHY registers */
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struct e1000_phy_regs phy_regs;
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struct e1000_ring test_tx_ring;
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struct e1000_ring test_rx_ring;
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u32 test_icr;
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u32 msg_enable;
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unsigned int num_vectors;
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struct msix_entry *msix_entries;
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int int_mode;
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u32 eiac_mask;
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u32 eeprom_wol;
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u32 wol;
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u32 pba;
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u32 max_hw_frame_size;
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bool fc_autoneg;
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unsigned int flags;
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unsigned int flags2;
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struct work_struct downshift_task;
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struct work_struct update_phy_task;
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struct work_struct print_hang_task;
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bool idle_check;
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int phy_hang_count;
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};
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struct e1000_info {
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enum e1000_mac_type mac;
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unsigned int flags;
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unsigned int flags2;
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u32 pba;
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u32 max_hw_frame_size;
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s32 (*get_variants)(struct e1000_adapter *);
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struct e1000_mac_operations *mac_ops;
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struct e1000_phy_operations *phy_ops;
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struct e1000_nvm_operations *nvm_ops;
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};
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/* hardware capability, feature, and workaround flags */
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#define FLAG_HAS_AMT (1 << 0)
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#define FLAG_HAS_FLASH (1 << 1)
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#define FLAG_HAS_HW_VLAN_FILTER (1 << 2)
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#define FLAG_HAS_WOL (1 << 3)
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#define FLAG_HAS_ERT (1 << 4)
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#define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5)
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#define FLAG_HAS_SWSM_ON_LOAD (1 << 6)
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#define FLAG_HAS_JUMBO_FRAMES (1 << 7)
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#define FLAG_READ_ONLY_NVM (1 << 8)
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#define FLAG_IS_ICH (1 << 9)
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#define FLAG_HAS_MSIX (1 << 10)
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#define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
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#define FLAG_IS_QUAD_PORT_A (1 << 12)
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#define FLAG_IS_QUAD_PORT (1 << 13)
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#define FLAG_TIPG_MEDIUM_FOR_80003ESLAN (1 << 14)
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#define FLAG_APME_IN_WUC (1 << 15)
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#define FLAG_APME_IN_CTRL3 (1 << 16)
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#define FLAG_APME_CHECK_PORT_B (1 << 17)
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#define FLAG_DISABLE_FC_PAUSE_TIME (1 << 18)
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#define FLAG_NO_WAKE_UCAST (1 << 19)
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#define FLAG_MNG_PT_ENABLED (1 << 20)
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#define FLAG_RESET_OVERWRITES_LAA (1 << 21)
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#define FLAG_TARC_SPEED_MODE_BIT (1 << 22)
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#define FLAG_TARC_SET_BIT_ZERO (1 << 23)
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#define FLAG_RX_NEEDS_RESTART (1 << 24)
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#define FLAG_LSC_GIG_SPEED_DROP (1 << 25)
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#define FLAG_SMART_POWER_DOWN (1 << 26)
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#define FLAG_MSI_ENABLED (1 << 27)
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#define FLAG_RX_CSUM_ENABLED (1 << 28)
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#define FLAG_TSO_FORCE (1 << 29)
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#define FLAG_RX_RESTART_NOW (1 << 30)
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#define FLAG_MSI_TEST_FAILED (1 << 31)
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/* CRC Stripping defines */
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#define FLAG2_CRC_STRIPPING (1 << 0)
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#define FLAG2_HAS_PHY_WAKEUP (1 << 1)
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#define FLAG2_IS_DISCARDING (1 << 2)
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#define FLAG2_DISABLE_ASPM_L1 (1 << 3)
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#define FLAG2_HAS_PHY_STATS (1 << 4)
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#define FLAG2_HAS_EEE (1 << 5)
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#define FLAG2_DMA_BURST (1 << 6)
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#define FLAG2_DISABLE_ASPM_L0S (1 << 7)
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#define FLAG2_DISABLE_AIM (1 << 8)
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#define FLAG2_CHECK_PHY_HANG (1 << 9)
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#define E1000_RX_DESC_PS(R, i) \
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(&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
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#define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i]))
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#define E1000_RX_DESC(R, i) E1000_GET_DESC(R, i, e1000_rx_desc)
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#define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc)
|
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#define E1000_CONTEXT_DESC(R, i) E1000_GET_DESC(R, i, e1000_context_desc)
|
|
|
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enum e1000_state_t {
|
|
__E1000_TESTING,
|
|
__E1000_RESETTING,
|
|
__E1000_DOWN
|
|
};
|
|
|
|
enum latency_range {
|
|
lowest_latency = 0,
|
|
low_latency = 1,
|
|
bulk_latency = 2,
|
|
latency_invalid = 255
|
|
};
|
|
|
|
extern char e1000e_driver_name[];
|
|
extern const char e1000e_driver_version[];
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|
|
|
extern void e1000e_check_options(struct e1000_adapter *adapter);
|
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extern void e1000e_set_ethtool_ops(struct net_device *netdev);
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|
|
|
extern int e1000e_up(struct e1000_adapter *adapter);
|
|
extern void e1000e_down(struct e1000_adapter *adapter);
|
|
extern void e1000e_reinit_locked(struct e1000_adapter *adapter);
|
|
extern void e1000e_reset(struct e1000_adapter *adapter);
|
|
extern void e1000e_power_up_phy(struct e1000_adapter *adapter);
|
|
extern int e1000e_setup_rx_resources(struct e1000_adapter *adapter);
|
|
extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter);
|
|
extern void e1000e_free_rx_resources(struct e1000_adapter *adapter);
|
|
extern void e1000e_free_tx_resources(struct e1000_adapter *adapter);
|
|
extern struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
|
|
struct rtnl_link_stats64
|
|
*stats);
|
|
extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter);
|
|
extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter);
|
|
extern void e1000e_get_hw_control(struct e1000_adapter *adapter);
|
|
extern void e1000e_release_hw_control(struct e1000_adapter *adapter);
|
|
|
|
extern unsigned int copybreak;
|
|
|
|
extern char *e1000e_get_hw_dev_name(struct e1000_hw *hw);
|
|
|
|
extern struct e1000_info e1000_82571_info;
|
|
extern struct e1000_info e1000_82572_info;
|
|
extern struct e1000_info e1000_82573_info;
|
|
extern struct e1000_info e1000_82574_info;
|
|
extern struct e1000_info e1000_82583_info;
|
|
extern struct e1000_info e1000_ich8_info;
|
|
extern struct e1000_info e1000_ich9_info;
|
|
extern struct e1000_info e1000_ich10_info;
|
|
extern struct e1000_info e1000_pch_info;
|
|
extern struct e1000_info e1000_pch2_info;
|
|
extern struct e1000_info e1000_es2_info;
|
|
|
|
extern s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
|
|
u32 pba_num_size);
|
|
|
|
extern s32 e1000e_commit_phy(struct e1000_hw *hw);
|
|
|
|
extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);
|
|
|
|
extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw);
|
|
extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state);
|
|
|
|
extern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw);
|
|
extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
|
|
bool state);
|
|
extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
|
|
extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
|
|
extern void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw);
|
|
extern void e1000_resume_workarounds_pchlan(struct e1000_hw *hw);
|
|
extern s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable);
|
|
extern s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable);
|
|
extern void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw);
|
|
|
|
extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
|
|
extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
|
|
extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);
|
|
extern s32 e1000e_setup_led_generic(struct e1000_hw *hw);
|
|
extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);
|
|
extern s32 e1000e_led_on_generic(struct e1000_hw *hw);
|
|
extern s32 e1000e_led_off_generic(struct e1000_hw *hw);
|
|
extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw);
|
|
extern void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
|
|
extern void e1000_set_lan_id_single_port(struct e1000_hw *hw);
|
|
extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex);
|
|
extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex);
|
|
extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw);
|
|
extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw);
|
|
extern s32 e1000e_id_led_init(struct e1000_hw *hw);
|
|
extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw);
|
|
extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw);
|
|
extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw);
|
|
extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw);
|
|
extern s32 e1000e_setup_link(struct e1000_hw *hw);
|
|
extern void e1000_clear_vfta_generic(struct e1000_hw *hw);
|
|
extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
|
|
extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
|
|
u8 *mc_addr_list,
|
|
u32 mc_addr_count);
|
|
extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
|
|
extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw);
|
|
extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);
|
|
extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw);
|
|
extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data);
|
|
extern void e1000e_config_collision_dist(struct e1000_hw *hw);
|
|
extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw);
|
|
extern s32 e1000e_force_mac_fc(struct e1000_hw *hw);
|
|
extern s32 e1000e_blink_led_generic(struct e1000_hw *hw);
|
|
extern void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
|
|
extern s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw);
|
|
extern void e1000e_reset_adaptive(struct e1000_hw *hw);
|
|
extern void e1000e_update_adaptive(struct e1000_hw *hw);
|
|
|
|
extern s32 e1000e_setup_copper_link(struct e1000_hw *hw);
|
|
extern s32 e1000e_get_phy_id(struct e1000_hw *hw);
|
|
extern void e1000e_put_hw_semaphore(struct e1000_hw *hw);
|
|
extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw);
|
|
extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
|
|
extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
|
|
extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw);
|
|
extern s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page);
|
|
extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
|
|
extern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
|
|
u16 *data);
|
|
extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
|
|
extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
|
|
extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
|
|
extern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
|
|
u16 data);
|
|
extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw);
|
|
extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
|
|
extern s32 e1000e_get_cfg_done(struct e1000_hw *hw);
|
|
extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
|
|
extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
|
|
extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
|
|
extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
|
|
extern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw);
|
|
extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
|
|
extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
|
|
extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
|
|
extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
|
|
extern s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw,
|
|
u16 *phy_reg);
|
|
extern s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw,
|
|
u16 *phy_reg);
|
|
extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
|
|
extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
|
|
extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
|
|
extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
|
|
extern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
|
|
u16 data);
|
|
extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
|
|
extern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
|
|
u16 *data);
|
|
extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
|
|
u32 usec_interval, bool *success);
|
|
extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
|
|
extern void e1000_power_up_phy_copper(struct e1000_hw *hw);
|
|
extern void e1000_power_down_phy_copper(struct e1000_hw *hw);
|
|
extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
|
|
extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
|
|
extern s32 e1000e_check_downshift(struct e1000_hw *hw);
|
|
extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
|
|
extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
|
|
u16 *data);
|
|
extern s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset,
|
|
u16 *data);
|
|
extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
|
|
extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
|
|
u16 data);
|
|
extern s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset,
|
|
u16 data);
|
|
extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);
|
|
extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);
|
|
extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
|
|
extern s32 e1000_get_phy_info_82577(struct e1000_hw *hw);
|
|
extern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw);
|
|
extern s32 e1000_get_cable_length_82577(struct e1000_hw *hw);
|
|
|
|
extern s32 e1000_check_polarity_m88(struct e1000_hw *hw);
|
|
extern s32 e1000_get_phy_info_ife(struct e1000_hw *hw);
|
|
extern s32 e1000_check_polarity_ife(struct e1000_hw *hw);
|
|
extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw);
|
|
extern s32 e1000_check_polarity_igp(struct e1000_hw *hw);
|
|
extern bool e1000_check_phy_82574(struct e1000_hw *hw);
|
|
|
|
static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
|
|
{
|
|
return hw->phy.ops.reset(hw);
|
|
}
|
|
|
|
static inline s32 e1000_check_reset_block(struct e1000_hw *hw)
|
|
{
|
|
return hw->phy.ops.check_reset_block(hw);
|
|
}
|
|
|
|
static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)
|
|
{
|
|
return hw->phy.ops.read_reg(hw, offset, data);
|
|
}
|
|
|
|
static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data)
|
|
{
|
|
return hw->phy.ops.write_reg(hw, offset, data);
|
|
}
|
|
|
|
static inline s32 e1000_get_cable_length(struct e1000_hw *hw)
|
|
{
|
|
return hw->phy.ops.get_cable_length(hw);
|
|
}
|
|
|
|
extern s32 e1000e_acquire_nvm(struct e1000_hw *hw);
|
|
extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
|
|
extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw);
|
|
extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
|
|
extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
|
|
extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw);
|
|
extern void e1000e_release_nvm(struct e1000_hw *hw);
|
|
extern void e1000e_reload_nvm(struct e1000_hw *hw);
|
|
extern s32 e1000_read_mac_addr_generic(struct e1000_hw *hw);
|
|
|
|
static inline s32 e1000e_read_mac_addr(struct e1000_hw *hw)
|
|
{
|
|
if (hw->mac.ops.read_mac_addr)
|
|
return hw->mac.ops.read_mac_addr(hw);
|
|
|
|
return e1000_read_mac_addr_generic(hw);
|
|
}
|
|
|
|
static inline s32 e1000_validate_nvm_checksum(struct e1000_hw *hw)
|
|
{
|
|
return hw->nvm.ops.validate(hw);
|
|
}
|
|
|
|
static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw)
|
|
{
|
|
return hw->nvm.ops.update(hw);
|
|
}
|
|
|
|
static inline s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
|
|
{
|
|
return hw->nvm.ops.read(hw, offset, words, data);
|
|
}
|
|
|
|
static inline s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
|
|
{
|
|
return hw->nvm.ops.write(hw, offset, words, data);
|
|
}
|
|
|
|
static inline s32 e1000_get_phy_info(struct e1000_hw *hw)
|
|
{
|
|
return hw->phy.ops.get_info(hw);
|
|
}
|
|
|
|
static inline s32 e1000e_check_mng_mode(struct e1000_hw *hw)
|
|
{
|
|
return hw->mac.ops.check_mng_mode(hw);
|
|
}
|
|
|
|
extern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw);
|
|
extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
|
|
extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
|
|
|
|
static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)
|
|
{
|
|
return readl(hw->hw_addr + reg);
|
|
}
|
|
|
|
static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
|
|
{
|
|
writel(val, hw->hw_addr + reg);
|
|
}
|
|
|
|
#endif /* _E1000_H_ */
|