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bee7f9c83e
Current ACPI tables in initrd is limited to 10, that is too small.
64 should be good enough as we have 35 sigs and could have several
SSDT.
Two problems in current code prevent us from increasing limit:
1. The cpio file info array is put in stack, as every element is 32
bytes, could run out of stack if we have that array size to 64.
We can move it out from stack, make it global and put it into the
__initdata section.
2. early_ioremap() only can remap 256k one time. Current code maps
10 tables at a time. If we increased that limit, the whole size
could be more than 256k, so early_ioremap() would fail with that.
We can map chunks one by one during copying, instead of mapping
all of them together.
Signed-off-by: Yinghai <yinghai@kernel.org>
Acked-by: Tejun Heo <tj@kernel.org>
Tested-by: Thomas Renninger <trenn@suse.de>
Reviewed-by: Tang Chen <tangchen@cn.fujitsu.com>
Tested-by: Tang Chen <tangchen@cn.fujitsu.com>
Acked-by: Toshi Kani <toshi.kani@hp.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
190 lines
5.0 KiB
C
190 lines
5.0 KiB
C
#ifndef _ASM_X86_ACPI_H
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#define _ASM_X86_ACPI_H
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/*
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* Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
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* Copyright (C) 2001 Patrick Mochel <mochel@osdl.org>
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*/
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#include <acpi/pdc_intel.h>
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#include <asm/numa.h>
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#include <asm/fixmap.h>
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#include <asm/processor.h>
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#include <asm/mmu.h>
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#include <asm/mpspec.h>
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#include <asm/realmode.h>
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#define COMPILER_DEPENDENT_INT64 long long
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#define COMPILER_DEPENDENT_UINT64 unsigned long long
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/*
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* Calling conventions:
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*
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* ACPI_SYSTEM_XFACE - Interfaces to host OS (handlers, threads)
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* ACPI_EXTERNAL_XFACE - External ACPI interfaces
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* ACPI_INTERNAL_XFACE - Internal ACPI interfaces
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* ACPI_INTERNAL_VAR_XFACE - Internal variable-parameter list interfaces
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*/
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#define ACPI_SYSTEM_XFACE
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#define ACPI_EXTERNAL_XFACE
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#define ACPI_INTERNAL_XFACE
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#define ACPI_INTERNAL_VAR_XFACE
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/* Asm macros */
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#define ACPI_FLUSH_CPU_CACHE() wbinvd()
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int __acpi_acquire_global_lock(unsigned int *lock);
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int __acpi_release_global_lock(unsigned int *lock);
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#define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \
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((Acq) = __acpi_acquire_global_lock(&facs->global_lock))
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#define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \
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((Acq) = __acpi_release_global_lock(&facs->global_lock))
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/*
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* Math helper asm macros
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*/
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#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \
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asm("divl %2;" \
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: "=a"(q32), "=d"(r32) \
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: "r"(d32), \
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"0"(n_lo), "1"(n_hi))
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#define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \
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asm("shrl $1,%2 ;" \
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"rcrl $1,%3;" \
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: "=r"(n_hi), "=r"(n_lo) \
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: "0"(n_hi), "1"(n_lo))
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#ifdef CONFIG_ACPI
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extern int acpi_lapic;
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extern int acpi_ioapic;
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extern int acpi_noirq;
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extern int acpi_strict;
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extern int acpi_disabled;
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extern int acpi_pci_disabled;
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extern int acpi_skip_timer_override;
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extern int acpi_use_timer_override;
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extern int acpi_fix_pin2_polarity;
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extern int acpi_disable_cmcff;
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extern u8 acpi_sci_flags;
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extern int acpi_sci_override_gsi;
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void acpi_pic_sci_set_trigger(unsigned int, u16);
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extern int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
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int trigger, int polarity);
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static inline void disable_acpi(void)
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{
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acpi_disabled = 1;
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acpi_pci_disabled = 1;
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acpi_noirq = 1;
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}
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extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
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static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
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static inline void acpi_disable_pci(void)
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{
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acpi_pci_disabled = 1;
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acpi_noirq_set();
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}
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/* Low-level suspend routine. */
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extern int (*acpi_suspend_lowlevel)(void);
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/* Physical address to resume after wakeup */
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#define acpi_wakeup_address ((unsigned long)(real_mode_header->wakeup_start))
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/*
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* Check if the CPU can handle C2 and deeper
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*/
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static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
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{
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/*
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* Early models (<=5) of AMD Opterons are not supposed to go into
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* C2 state.
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*
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* Steppings 0x0A and later are good
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*/
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if (boot_cpu_data.x86 == 0x0F &&
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boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
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boot_cpu_data.x86_model <= 0x05 &&
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boot_cpu_data.x86_mask < 0x0A)
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return 1;
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else if (amd_e400_c1e_detected)
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return 1;
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else
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return max_cstate;
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}
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static inline bool arch_has_acpi_pdc(void)
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{
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struct cpuinfo_x86 *c = &cpu_data(0);
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return (c->x86_vendor == X86_VENDOR_INTEL ||
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c->x86_vendor == X86_VENDOR_CENTAUR);
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}
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static inline void arch_acpi_set_pdc_bits(u32 *buf)
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{
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struct cpuinfo_x86 *c = &cpu_data(0);
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buf[2] |= ACPI_PDC_C_CAPABILITY_SMP;
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if (cpu_has(c, X86_FEATURE_EST))
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buf[2] |= ACPI_PDC_EST_CAPABILITY_SWSMP;
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if (cpu_has(c, X86_FEATURE_ACPI))
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buf[2] |= ACPI_PDC_T_FFH;
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/*
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* If mwait/monitor is unsupported, C2/C3_FFH will be disabled
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*/
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if (!cpu_has(c, X86_FEATURE_MWAIT))
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buf[2] &= ~(ACPI_PDC_C_C2C3_FFH);
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}
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#else /* !CONFIG_ACPI */
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#define acpi_lapic 0
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#define acpi_ioapic 0
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#define acpi_disable_cmcff 0
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static inline void acpi_noirq_set(void) { }
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static inline void acpi_disable_pci(void) { }
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static inline void disable_acpi(void) { }
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#endif /* !CONFIG_ACPI */
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#define ARCH_HAS_POWER_INIT 1
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#ifdef CONFIG_ACPI_NUMA
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extern int acpi_numa;
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extern int x86_acpi_numa_init(void);
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#endif /* CONFIG_ACPI_NUMA */
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#define acpi_unlazy_tlb(x) leave_mm(x)
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#endif /* _ASM_X86_ACPI_H */
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