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b575b5a1e6
On 32-bit ARM, AES in GCM mode takes full advantage of the ARMv8 Crypto Extensions when available, resulting in a performance of 6-7 cycles per byte for typical IPsec frames on cores such as Cortex-A53, using the generic GCM template encapsulating the accelerated AES-CTR and GHASH implementations. At such high rates, any time spent copying data or doing other poorly optimized work in the generic layer hurts disproportionately, and we can get a significant performance improvement by combining the optimized AES-CTR and GHASH implementations into a single GCM driver. On Cortex-A53, this results in a performance improvement of around 75%, and AES-256-GCM-128 with RFC4106 encapsulation runs in 4 cycles per byte. Note that this code takes advantage of the fact that kernel mode NEON is now supported in softirq context as well, and therefore does not provide a non-NEON fallback path at all. (AEADs are only callable in process or softirq context) Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
246 lines
6.9 KiB
Plaintext
246 lines
6.9 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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menu "Accelerated Cryptographic Algorithms for CPU (arm)"
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config CRYPTO_CURVE25519_NEON
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tristate "Public key crypto: Curve25519 (NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_LIB_CURVE25519_GENERIC
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select CRYPTO_ARCH_HAVE_LIB_CURVE25519
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help
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Curve25519 algorithm
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Architecture: arm with
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- NEON (Advanced SIMD) extensions
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config CRYPTO_GHASH_ARM_CE
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tristate "Hash functions: GHASH (PMULL/NEON/ARMv8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_AEAD
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select CRYPTO_HASH
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select CRYPTO_CRYPTD
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select CRYPTO_LIB_AES
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select CRYPTO_LIB_GF128MUL
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help
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GCM GHASH function (NIST SP800-38D)
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Architecture: arm using
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- PMULL (Polynomial Multiply Long) instructions
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- NEON (Advanced SIMD) extensions
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- ARMv8 Crypto Extensions
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Use an implementation of GHASH (used by the GCM AEAD chaining mode)
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that uses the 64x64 to 128 bit polynomial multiplication (vmull.p64)
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that is part of the ARMv8 Crypto Extensions, or a slower variant that
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uses the vmull.p8 instruction that is part of the basic NEON ISA.
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config CRYPTO_NHPOLY1305_NEON
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tristate "Hash functions: NHPoly1305 (NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_NHPOLY1305
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help
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NHPoly1305 hash function (Adiantum)
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Architecture: arm using:
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- NEON (Advanced SIMD) extensions
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config CRYPTO_POLY1305_ARM
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tristate "Hash functions: Poly1305 (NEON)"
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select CRYPTO_HASH
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select CRYPTO_ARCH_HAVE_LIB_POLY1305
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help
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Poly1305 authenticator algorithm (RFC7539)
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Architecture: arm optionally using
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- NEON (Advanced SIMD) extensions
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config CRYPTO_BLAKE2S_ARM
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bool "Hash functions: BLAKE2s"
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select CRYPTO_ARCH_HAVE_LIB_BLAKE2S
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help
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BLAKE2s cryptographic hash function (RFC 7693)
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Architecture: arm
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This is faster than the generic implementations of BLAKE2s and
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BLAKE2b, but slower than the NEON implementation of BLAKE2b.
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There is no NEON implementation of BLAKE2s, since NEON doesn't
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really help with it.
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config CRYPTO_BLAKE2B_NEON
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tristate "Hash functions: BLAKE2b (NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_BLAKE2B
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help
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BLAKE2b cryptographic hash function (RFC 7693)
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Architecture: arm using
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- NEON (Advanced SIMD) extensions
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BLAKE2b digest algorithm optimized with ARM NEON instructions.
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On ARM processors that have NEON support but not the ARMv8
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Crypto Extensions, typically this BLAKE2b implementation is
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much faster than the SHA-2 family and slightly faster than
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SHA-1.
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config CRYPTO_SHA1_ARM
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tristate "Hash functions: SHA-1"
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select CRYPTO_SHA1
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select CRYPTO_HASH
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help
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SHA-1 secure hash algorithm (FIPS 180)
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Architecture: arm
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config CRYPTO_SHA1_ARM_NEON
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tristate "Hash functions: SHA-1 (NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA1_ARM
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select CRYPTO_SHA1
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select CRYPTO_HASH
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help
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SHA-1 secure hash algorithm (FIPS 180)
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Architecture: arm using
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- NEON (Advanced SIMD) extensions
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config CRYPTO_SHA1_ARM_CE
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tristate "Hash functions: SHA-1 (ARMv8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA1_ARM
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select CRYPTO_HASH
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help
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SHA-1 secure hash algorithm (FIPS 180)
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Architecture: arm using ARMv8 Crypto Extensions
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config CRYPTO_SHA2_ARM_CE
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tristate "Hash functions: SHA-224 and SHA-256 (ARMv8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA256_ARM
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select CRYPTO_HASH
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help
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SHA-224 and SHA-256 secure hash algorithms (FIPS 180)
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Architecture: arm using
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- ARMv8 Crypto Extensions
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config CRYPTO_SHA256_ARM
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tristate "Hash functions: SHA-224 and SHA-256 (NEON)"
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select CRYPTO_HASH
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depends on !CPU_V7M
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help
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SHA-224 and SHA-256 secure hash algorithms (FIPS 180)
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Architecture: arm using
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- NEON (Advanced SIMD) extensions
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config CRYPTO_SHA512_ARM
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tristate "Hash functions: SHA-384 and SHA-512 (NEON)"
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select CRYPTO_HASH
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depends on !CPU_V7M
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help
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SHA-384 and SHA-512 secure hash algorithms (FIPS 180)
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Architecture: arm using
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- NEON (Advanced SIMD) extensions
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config CRYPTO_AES_ARM
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tristate "Ciphers: AES"
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select CRYPTO_ALGAPI
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select CRYPTO_AES
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help
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Block ciphers: AES cipher algorithms (FIPS-197)
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Architecture: arm
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On ARM processors without the Crypto Extensions, this is the
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fastest AES implementation for single blocks. For multiple
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blocks, the NEON bit-sliced implementation is usually faster.
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This implementation may be vulnerable to cache timing attacks,
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since it uses lookup tables. However, as countermeasures it
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disables IRQs and preloads the tables; it is hoped this makes
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such attacks very difficult.
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config CRYPTO_AES_ARM_BS
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tristate "Ciphers: AES, modes: ECB/CBC/CTR/XTS (bit-sliced NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SKCIPHER
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select CRYPTO_LIB_AES
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select CRYPTO_AES
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select CRYPTO_CBC
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select CRYPTO_SIMD
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help
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Length-preserving ciphers: AES cipher algorithms (FIPS-197)
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with block cipher modes:
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- ECB (Electronic Codebook) mode (NIST SP800-38A)
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- CBC (Cipher Block Chaining) mode (NIST SP800-38A)
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- CTR (Counter) mode (NIST SP800-38A)
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- XTS (XOR Encrypt XOR with ciphertext stealing) mode (NIST SP800-38E
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and IEEE 1619)
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Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode
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and for XTS mode encryption, CBC and XTS mode decryption speedup is
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around 25%. (CBC encryption speed is not affected by this driver.)
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This implementation does not rely on any lookup tables so it is
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believed to be invulnerable to cache timing attacks.
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config CRYPTO_AES_ARM_CE
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tristate "Ciphers: AES, modes: ECB/CBC/CTS/CTR/XTS (ARMv8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SKCIPHER
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select CRYPTO_LIB_AES
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select CRYPTO_SIMD
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help
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Length-preserving ciphers: AES cipher algorithms (FIPS-197)
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with block cipher modes:
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- ECB (Electronic Codebook) mode (NIST SP800-38A)
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- CBC (Cipher Block Chaining) mode (NIST SP800-38A)
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- CTR (Counter) mode (NIST SP800-38A)
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- CTS (Cipher Text Stealing) mode (NIST SP800-38A)
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- XTS (XOR Encrypt XOR with ciphertext stealing) mode (NIST SP800-38E
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and IEEE 1619)
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Architecture: arm using:
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- ARMv8 Crypto Extensions
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config CRYPTO_CHACHA20_NEON
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tristate "Ciphers: ChaCha20, XChaCha20, XChaCha12 (NEON)"
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select CRYPTO_SKCIPHER
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select CRYPTO_ARCH_HAVE_LIB_CHACHA
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help
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Length-preserving ciphers: ChaCha20, XChaCha20, and XChaCha12
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stream cipher algorithms
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Architecture: arm using:
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- NEON (Advanced SIMD) extensions
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config CRYPTO_CRC32_ARM_CE
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tristate "CRC32C and CRC32"
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depends on KERNEL_MODE_NEON
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depends on CRC32
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select CRYPTO_HASH
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help
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CRC32c CRC algorithm with the iSCSI polynomial (RFC 3385 and RFC 3720)
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and CRC32 CRC algorithm (IEEE 802.3)
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Architecture: arm using:
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- CRC and/or PMULL instructions
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Drivers: crc32-arm-ce and crc32c-arm-ce
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config CRYPTO_CRCT10DIF_ARM_CE
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tristate "CRCT10DIF"
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depends on KERNEL_MODE_NEON
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depends on CRC_T10DIF
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select CRYPTO_HASH
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help
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CRC16 CRC algorithm used for the T10 (SCSI) Data Integrity Field (DIF)
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Architecture: arm using:
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- PMULL (Polynomial Multiply Long) instructions
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endmenu
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