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59bd5113d8
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8731 driver to use the more modern data structure. Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230713-asoc-cirrus-maple-v1-21-a62651831735@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
654 lines
16 KiB
C
654 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* wm8731.c -- WM8731 ALSA SoC Audio driver
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*
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* Copyright 2005 Openedhand Ltd.
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* Copyright 2006-12 Wolfson Microelectronics, plc
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*
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* Author: Richard Purdie <richard@openedhand.com>
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*
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* Based on wm8753.c by Liam Girdwood
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/slab.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/clk.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include "wm8731.h"
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static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = {
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"AVDD",
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"HPVDD",
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"DCVDD",
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"DBVDD",
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};
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/*
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* wm8731 register cache
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*/
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static const struct reg_default wm8731_reg_defaults[] = {
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{ 0, 0x0097 },
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{ 1, 0x0097 },
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{ 2, 0x0079 },
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{ 3, 0x0079 },
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{ 4, 0x000a },
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{ 5, 0x0008 },
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{ 6, 0x009f },
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{ 7, 0x000a },
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{ 8, 0x0000 },
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{ 9, 0x0000 },
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};
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static bool wm8731_volatile(struct device *dev, unsigned int reg)
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{
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return reg == WM8731_RESET;
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}
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#define wm8731_reset(m) regmap_write(m, WM8731_RESET, 0)
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static const char *wm8731_input_select[] = {"Line In", "Mic"};
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static SOC_ENUM_SINGLE_DECL(wm8731_insel_enum,
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WM8731_APANA, 2, wm8731_input_select);
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static int wm8731_deemph[] = { 0, 32000, 44100, 48000 };
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static int wm8731_set_deemph(struct snd_soc_component *component)
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{
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struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
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int val, i, best;
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/* If we're using deemphasis select the nearest available sample
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* rate.
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*/
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if (wm8731->deemph) {
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best = 1;
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for (i = 2; i < ARRAY_SIZE(wm8731_deemph); i++) {
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if (abs(wm8731_deemph[i] - wm8731->playback_fs) <
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abs(wm8731_deemph[best] - wm8731->playback_fs))
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best = i;
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}
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val = best << 1;
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} else {
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best = 0;
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val = 0;
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}
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dev_dbg(component->dev, "Set deemphasis %d (%dHz)\n",
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best, wm8731_deemph[best]);
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return snd_soc_component_update_bits(component, WM8731_APDIGI, 0x6, val);
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}
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static int wm8731_get_deemph(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
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struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
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ucontrol->value.integer.value[0] = wm8731->deemph;
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return 0;
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}
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static int wm8731_put_deemph(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
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struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
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unsigned int deemph = ucontrol->value.integer.value[0];
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int ret = 0;
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if (deemph > 1)
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return -EINVAL;
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mutex_lock(&wm8731->lock);
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if (wm8731->deemph != deemph) {
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wm8731->deemph = deemph;
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wm8731_set_deemph(component);
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ret = 1;
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}
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mutex_unlock(&wm8731->lock);
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return ret;
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}
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static const DECLARE_TLV_DB_SCALE(in_tlv, -3450, 150, 0);
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static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -1500, 300, 0);
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static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
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static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 2000, 0);
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static const struct snd_kcontrol_new wm8731_snd_controls[] = {
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SOC_DOUBLE_R_TLV("Master Playback Volume", WM8731_LOUT1V, WM8731_ROUT1V,
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0, 127, 0, out_tlv),
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SOC_DOUBLE_R("Master Playback ZC Switch", WM8731_LOUT1V, WM8731_ROUT1V,
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7, 1, 0),
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SOC_DOUBLE_R_TLV("Capture Volume", WM8731_LINVOL, WM8731_RINVOL, 0, 31, 0,
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in_tlv),
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SOC_DOUBLE_R("Line Capture Switch", WM8731_LINVOL, WM8731_RINVOL, 7, 1, 1),
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SOC_SINGLE_TLV("Mic Boost Volume", WM8731_APANA, 0, 1, 0, mic_tlv),
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SOC_SINGLE("Mic Capture Switch", WM8731_APANA, 1, 1, 1),
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SOC_SINGLE_TLV("Sidetone Playback Volume", WM8731_APANA, 6, 3, 1,
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sidetone_tlv),
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SOC_SINGLE("ADC High Pass Filter Switch", WM8731_APDIGI, 0, 1, 1),
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SOC_SINGLE("Store DC Offset Switch", WM8731_APDIGI, 4, 1, 0),
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SOC_SINGLE_BOOL_EXT("Playback Deemphasis Switch", 0,
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wm8731_get_deemph, wm8731_put_deemph),
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};
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/* Output Mixer */
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static const struct snd_kcontrol_new wm8731_output_mixer_controls[] = {
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SOC_DAPM_SINGLE("Line Bypass Switch", WM8731_APANA, 3, 1, 0),
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SOC_DAPM_SINGLE("Mic Sidetone Switch", WM8731_APANA, 5, 1, 0),
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SOC_DAPM_SINGLE("HiFi Playback Switch", WM8731_APANA, 4, 1, 0),
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};
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/* Input mux */
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static const struct snd_kcontrol_new wm8731_input_mux_controls =
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SOC_DAPM_ENUM("Input Select", wm8731_insel_enum);
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static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
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SND_SOC_DAPM_SUPPLY("ACTIVE",WM8731_ACTIVE, 0, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("OSC", WM8731_PWR, 5, 1, NULL, 0),
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SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1,
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&wm8731_output_mixer_controls[0],
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ARRAY_SIZE(wm8731_output_mixer_controls)),
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SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8731_PWR, 3, 1),
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SND_SOC_DAPM_OUTPUT("LOUT"),
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SND_SOC_DAPM_OUTPUT("LHPOUT"),
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SND_SOC_DAPM_OUTPUT("ROUT"),
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SND_SOC_DAPM_OUTPUT("RHPOUT"),
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SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8731_PWR, 2, 1),
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SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &wm8731_input_mux_controls),
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SND_SOC_DAPM_PGA("Line Input", WM8731_PWR, 0, 1, NULL, 0),
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SND_SOC_DAPM_MICBIAS("Mic Bias", WM8731_PWR, 1, 1),
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SND_SOC_DAPM_INPUT("MICIN"),
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SND_SOC_DAPM_INPUT("RLINEIN"),
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SND_SOC_DAPM_INPUT("LLINEIN"),
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};
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static int wm8731_check_osc(struct snd_soc_dapm_widget *source,
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struct snd_soc_dapm_widget *sink)
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{
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struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
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struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
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return wm8731->sysclk_type == WM8731_SYSCLK_XTAL;
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}
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static const struct snd_soc_dapm_route wm8731_intercon[] = {
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{"DAC", NULL, "OSC", wm8731_check_osc},
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{"ADC", NULL, "OSC", wm8731_check_osc},
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{"DAC", NULL, "ACTIVE"},
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{"ADC", NULL, "ACTIVE"},
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/* output mixer */
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{"Output Mixer", "Line Bypass Switch", "Line Input"},
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{"Output Mixer", "HiFi Playback Switch", "DAC"},
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{"Output Mixer", "Mic Sidetone Switch", "Mic Bias"},
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/* outputs */
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{"RHPOUT", NULL, "Output Mixer"},
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{"ROUT", NULL, "Output Mixer"},
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{"LHPOUT", NULL, "Output Mixer"},
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{"LOUT", NULL, "Output Mixer"},
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/* input mux */
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{"Input Mux", "Line In", "Line Input"},
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{"Input Mux", "Mic", "Mic Bias"},
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{"ADC", NULL, "Input Mux"},
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/* inputs */
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{"Line Input", NULL, "LLINEIN"},
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{"Line Input", NULL, "RLINEIN"},
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{"Mic Bias", NULL, "MICIN"},
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};
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struct _coeff_div {
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u32 mclk;
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u32 rate;
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u16 fs;
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u8 sr:4;
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u8 bosr:1;
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u8 usb:1;
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};
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/* codec mclk clock divider coefficients */
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static const struct _coeff_div coeff_div[] = {
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/* 48k */
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{12288000, 48000, 256, 0x0, 0x0, 0x0},
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{18432000, 48000, 384, 0x0, 0x1, 0x0},
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{12000000, 48000, 250, 0x0, 0x0, 0x1},
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/* 32k */
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{12288000, 32000, 384, 0x6, 0x0, 0x0},
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{18432000, 32000, 576, 0x6, 0x1, 0x0},
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{12000000, 32000, 375, 0x6, 0x0, 0x1},
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/* 8k */
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{12288000, 8000, 1536, 0x3, 0x0, 0x0},
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{18432000, 8000, 2304, 0x3, 0x1, 0x0},
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{11289600, 8000, 1408, 0xb, 0x0, 0x0},
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{16934400, 8000, 2112, 0xb, 0x1, 0x0},
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{12000000, 8000, 1500, 0x3, 0x0, 0x1},
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/* 96k */
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{12288000, 96000, 128, 0x7, 0x0, 0x0},
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{18432000, 96000, 192, 0x7, 0x1, 0x0},
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{12000000, 96000, 125, 0x7, 0x0, 0x1},
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/* 44.1k */
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{11289600, 44100, 256, 0x8, 0x0, 0x0},
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{16934400, 44100, 384, 0x8, 0x1, 0x0},
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{12000000, 44100, 272, 0x8, 0x1, 0x1},
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/* 88.2k */
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{11289600, 88200, 128, 0xf, 0x0, 0x0},
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{16934400, 88200, 192, 0xf, 0x1, 0x0},
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{12000000, 88200, 136, 0xf, 0x1, 0x1},
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};
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/* rates constraints */
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static const unsigned int wm8731_rates_12000000[] = {
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8000, 32000, 44100, 48000, 96000, 88200,
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};
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static const unsigned int wm8731_rates_12288000_18432000[] = {
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8000, 32000, 48000, 96000,
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};
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static const unsigned int wm8731_rates_11289600_16934400[] = {
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8000, 44100, 88200,
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};
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static const struct snd_pcm_hw_constraint_list wm8731_constraints_12000000 = {
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.list = wm8731_rates_12000000,
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.count = ARRAY_SIZE(wm8731_rates_12000000),
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};
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static const
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struct snd_pcm_hw_constraint_list wm8731_constraints_12288000_18432000 = {
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.list = wm8731_rates_12288000_18432000,
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.count = ARRAY_SIZE(wm8731_rates_12288000_18432000),
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};
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static const
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struct snd_pcm_hw_constraint_list wm8731_constraints_11289600_16934400 = {
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.list = wm8731_rates_11289600_16934400,
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.count = ARRAY_SIZE(wm8731_rates_11289600_16934400),
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};
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static inline int get_coeff(int mclk, int rate)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
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if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
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return i;
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}
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return 0;
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}
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static int wm8731_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_component *component = dai->component;
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struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
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u16 iface = snd_soc_component_read(component, WM8731_IFACE) & 0xfff3;
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int i = get_coeff(wm8731->sysclk, params_rate(params));
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u16 srate = (coeff_div[i].sr << 2) |
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(coeff_div[i].bosr << 1) | coeff_div[i].usb;
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wm8731->playback_fs = params_rate(params);
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snd_soc_component_write(component, WM8731_SRATE, srate);
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/* bit size */
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switch (params_width(params)) {
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case 16:
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break;
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case 20:
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iface |= 0x0004;
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break;
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case 24:
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iface |= 0x0008;
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break;
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case 32:
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iface |= 0x000c;
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break;
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}
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wm8731_set_deemph(component);
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snd_soc_component_write(component, WM8731_IFACE, iface);
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return 0;
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}
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static int wm8731_mute(struct snd_soc_dai *dai, int mute, int direction)
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{
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struct snd_soc_component *component = dai->component;
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u16 mute_reg = snd_soc_component_read(component, WM8731_APDIGI) & 0xfff7;
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if (mute)
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snd_soc_component_write(component, WM8731_APDIGI, mute_reg | 0x8);
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else
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snd_soc_component_write(component, WM8731_APDIGI, mute_reg);
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return 0;
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}
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static int wm8731_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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int clk_id, unsigned int freq, int dir)
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{
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struct snd_soc_component *component = codec_dai->component;
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struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
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struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
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switch (clk_id) {
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case WM8731_SYSCLK_XTAL:
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case WM8731_SYSCLK_MCLK:
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if (wm8731->mclk && clk_set_rate(wm8731->mclk, freq))
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return -EINVAL;
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wm8731->sysclk_type = clk_id;
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break;
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default:
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return -EINVAL;
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}
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switch (freq) {
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case 0:
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wm8731->constraints = NULL;
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break;
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case 12000000:
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wm8731->constraints = &wm8731_constraints_12000000;
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break;
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case 12288000:
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case 18432000:
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wm8731->constraints = &wm8731_constraints_12288000_18432000;
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break;
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case 16934400:
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case 11289600:
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wm8731->constraints = &wm8731_constraints_11289600_16934400;
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break;
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default:
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return -EINVAL;
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}
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wm8731->sysclk = freq;
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snd_soc_dapm_sync(dapm);
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return 0;
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}
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static int wm8731_set_dai_fmt(struct snd_soc_dai *codec_dai,
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unsigned int fmt)
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{
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struct snd_soc_component *component = codec_dai->component;
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u16 iface = 0;
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switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
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case SND_SOC_DAIFMT_CBP_CFP:
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iface |= 0x0040;
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break;
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case SND_SOC_DAIFMT_CBC_CFC:
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break;
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default:
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return -EINVAL;
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}
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/* interface format */
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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iface |= 0x0002;
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break;
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case SND_SOC_DAIFMT_RIGHT_J:
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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iface |= 0x0001;
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break;
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case SND_SOC_DAIFMT_DSP_A:
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iface |= 0x0013;
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break;
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case SND_SOC_DAIFMT_DSP_B:
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iface |= 0x0003;
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break;
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default:
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return -EINVAL;
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}
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/* clock inversion */
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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break;
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case SND_SOC_DAIFMT_IB_IF:
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iface |= 0x0090;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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iface |= 0x0080;
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break;
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case SND_SOC_DAIFMT_NB_IF:
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iface |= 0x0010;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* set iface */
|
|
snd_soc_component_write(component, WM8731_IFACE, iface);
|
|
return 0;
|
|
}
|
|
|
|
static int wm8731_set_bias_level(struct snd_soc_component *component,
|
|
enum snd_soc_bias_level level)
|
|
{
|
|
struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
|
|
int ret;
|
|
u16 reg;
|
|
|
|
switch (level) {
|
|
case SND_SOC_BIAS_ON:
|
|
if (wm8731->mclk) {
|
|
ret = clk_prepare_enable(wm8731->mclk);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
break;
|
|
case SND_SOC_BIAS_PREPARE:
|
|
break;
|
|
case SND_SOC_BIAS_STANDBY:
|
|
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
|
|
ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
|
|
wm8731->supplies);
|
|
if (ret != 0)
|
|
return ret;
|
|
|
|
regcache_sync(wm8731->regmap);
|
|
}
|
|
|
|
/* Clear PWROFF, gate CLKOUT, everything else as-is */
|
|
reg = snd_soc_component_read(component, WM8731_PWR) & 0xff7f;
|
|
snd_soc_component_write(component, WM8731_PWR, reg | 0x0040);
|
|
break;
|
|
case SND_SOC_BIAS_OFF:
|
|
if (wm8731->mclk)
|
|
clk_disable_unprepare(wm8731->mclk);
|
|
snd_soc_component_write(component, WM8731_PWR, 0xffff);
|
|
regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
|
|
wm8731->supplies);
|
|
regcache_mark_dirty(wm8731->regmap);
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int wm8731_startup(struct snd_pcm_substream *substream,
|
|
struct snd_soc_dai *dai)
|
|
{
|
|
struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(dai->component);
|
|
|
|
if (wm8731->constraints)
|
|
snd_pcm_hw_constraint_list(substream->runtime, 0,
|
|
SNDRV_PCM_HW_PARAM_RATE,
|
|
wm8731->constraints);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#define WM8731_RATES SNDRV_PCM_RATE_8000_96000
|
|
|
|
#define WM8731_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
|
|
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
|
|
|
|
static const struct snd_soc_dai_ops wm8731_dai_ops = {
|
|
.startup = wm8731_startup,
|
|
.hw_params = wm8731_hw_params,
|
|
.mute_stream = wm8731_mute,
|
|
.set_sysclk = wm8731_set_dai_sysclk,
|
|
.set_fmt = wm8731_set_dai_fmt,
|
|
.no_capture_mute = 1,
|
|
};
|
|
|
|
static struct snd_soc_dai_driver wm8731_dai = {
|
|
.name = "wm8731-hifi",
|
|
.playback = {
|
|
.stream_name = "Playback",
|
|
.channels_min = 1,
|
|
.channels_max = 2,
|
|
.rates = WM8731_RATES,
|
|
.formats = WM8731_FORMATS,},
|
|
.capture = {
|
|
.stream_name = "Capture",
|
|
.channels_min = 1,
|
|
.channels_max = 2,
|
|
.rates = WM8731_RATES,
|
|
.formats = WM8731_FORMATS,},
|
|
.ops = &wm8731_dai_ops,
|
|
.symmetric_rate = 1,
|
|
};
|
|
|
|
static const struct snd_soc_component_driver soc_component_dev_wm8731 = {
|
|
.set_bias_level = wm8731_set_bias_level,
|
|
.controls = wm8731_snd_controls,
|
|
.num_controls = ARRAY_SIZE(wm8731_snd_controls),
|
|
.dapm_widgets = wm8731_dapm_widgets,
|
|
.num_dapm_widgets = ARRAY_SIZE(wm8731_dapm_widgets),
|
|
.dapm_routes = wm8731_intercon,
|
|
.num_dapm_routes = ARRAY_SIZE(wm8731_intercon),
|
|
.suspend_bias_off = 1,
|
|
.idle_bias_on = 1,
|
|
.use_pmdown_time = 1,
|
|
.endianness = 1,
|
|
};
|
|
|
|
int wm8731_init(struct device *dev, struct wm8731_priv *wm8731)
|
|
{
|
|
int ret = 0, i;
|
|
|
|
wm8731->mclk = devm_clk_get(dev, "mclk");
|
|
if (IS_ERR(wm8731->mclk)) {
|
|
ret = PTR_ERR(wm8731->mclk);
|
|
if (ret == -ENOENT) {
|
|
wm8731->mclk = NULL;
|
|
dev_warn(dev, "Assuming static MCLK\n");
|
|
} else {
|
|
dev_err(dev, "Failed to get MCLK: %d\n", ret);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
mutex_init(&wm8731->lock);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(wm8731->supplies); i++)
|
|
wm8731->supplies[i].supply = wm8731_supply_names[i];
|
|
|
|
ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(wm8731->supplies),
|
|
wm8731->supplies);
|
|
if (ret != 0) {
|
|
dev_err(dev, "Failed to request supplies: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
|
|
wm8731->supplies);
|
|
if (ret != 0) {
|
|
dev_err(dev, "Failed to enable supplies: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = wm8731_reset(wm8731->regmap);
|
|
if (ret < 0) {
|
|
dev_err(dev, "Failed to issue reset: %d\n", ret);
|
|
goto err_regulator_enable;
|
|
}
|
|
|
|
/* Clear POWEROFF, keep everything else disabled */
|
|
regmap_write(wm8731->regmap, WM8731_PWR, 0x7f);
|
|
|
|
/* Latch the update bits */
|
|
regmap_update_bits(wm8731->regmap, WM8731_LOUT1V, 0x100, 0);
|
|
regmap_update_bits(wm8731->regmap, WM8731_ROUT1V, 0x100, 0);
|
|
regmap_update_bits(wm8731->regmap, WM8731_LINVOL, 0x100, 0);
|
|
regmap_update_bits(wm8731->regmap, WM8731_RINVOL, 0x100, 0);
|
|
|
|
/* Disable bypass path by default */
|
|
regmap_update_bits(wm8731->regmap, WM8731_APANA, 0x8, 0);
|
|
|
|
regcache_mark_dirty(wm8731->regmap);
|
|
|
|
ret = devm_snd_soc_register_component(dev,
|
|
&soc_component_dev_wm8731, &wm8731_dai, 1);
|
|
if (ret != 0) {
|
|
dev_err(dev, "Failed to register CODEC: %d\n", ret);
|
|
goto err_regulator_enable;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_regulator_enable:
|
|
/* Regulators will be enabled by bias management */
|
|
regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(wm8731_init);
|
|
|
|
const struct regmap_config wm8731_regmap = {
|
|
.reg_bits = 7,
|
|
.val_bits = 9,
|
|
|
|
.max_register = WM8731_RESET,
|
|
.volatile_reg = wm8731_volatile,
|
|
|
|
.cache_type = REGCACHE_MAPLE,
|
|
.reg_defaults = wm8731_reg_defaults,
|
|
.num_reg_defaults = ARRAY_SIZE(wm8731_reg_defaults),
|
|
};
|
|
EXPORT_SYMBOL_GPL(wm8731_regmap);
|
|
|
|
MODULE_DESCRIPTION("ASoC WM8731 driver");
|
|
MODULE_AUTHOR("Richard Purdie");
|
|
MODULE_LICENSE("GPL");
|