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APM X-Gene v1 SoC supports its own implementation of MSI, which is not compliant to GIC V2M specification for MSI Termination. There is a single MSI block in X-Gene v1 SOC which serves all 5 PCIe ports. This MSI block supports 2048 MSI termination ports coalesced into 16 physical HW IRQ lines and shared across all 5 PCIe ports. As there are only 16 HW IRQs to serve 2048 MSI vectors, to support set_affinity correctly for each MSI vectors, the 16 HW IRQs are statically allocated to 8 X-Gene v1 cores (2 HW IRQs for each cores). To steer MSI interrupt to target CPU, MSI vector is moved around these HW IRQs lines. With this approach, the total MSI vectors this driver supports is reduced to 256. [bhelgaas: squash doc, driver, maintainer update] Signed-off-by: Duc Dang <dhdang@apm.com> Signed-off-by: Tanmay Inamdar <tinamdar@apm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> |
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| .. | ||
| 83xx-512x-pci.txt | ||
| brcm,iproc-pcie.txt | ||
| designware-pcie.txt | ||
| fsl,imx6q-pcie.txt | ||
| fsl,pci.txt | ||
| host-generic-pci.txt | ||
| layerscape-pci.txt | ||
| mvebu-pci.txt | ||
| nvidia,tegra20-pcie.txt | ||
| pci-keystone.txt | ||
| pci-rcar-gen2.txt | ||
| pci.txt | ||
| ralink,rt3883-pci.txt | ||
| rcar-pci.txt | ||
| samsung,exynos5440-pcie.txt | ||
| spear13xx-pcie.txt | ||
| ti-pci.txt | ||
| v3-v360epc-pci.txt | ||
| versatile.txt | ||
| xgene-pci-msi.txt | ||
| xgene-pci.txt | ||
| xilinx-pcie.txt | ||