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c0718df4d6
This is a first pass at reorganizing mach-omap2/voltage.c: - Separate almost all of the data from the code of mach-omap2/voltage.c. The code remains in mach-omap2/voltage.c. The data goes into one of several places, depending on what type of data it is: - Silicon process/validation data: mach-omap2/opp*_data.c - VC (Voltage Controller) data: mach-omap2/vc*_data.c - VP (Voltage Processor) data: mach-omap2/vp*_data.c - Voltage domain data: mach-omap2/voltagedomains*_data.c The ultimate goal is for all this data to be autogenerated, the same way we autogenerate the rest of our data. - Separate VC and VP common data from VDD-specific VC and VP data. - Separate common voltage.c code from SoC-specific code; reuse common code. - Reorganize structures to avoid unnecessary memory loss due to unpacked fields. There is much left to be done. VC code and VP code should be separated out into vc*.c and vp*.c files. Many fields in the existing structures are superfluous, and should be removed. Some code in voltage.c seems to be duplicated; that code should be moved into functions of its own. Proper voltage domain code should be created, as was done with the powerdomain and clockdomains, and powerdomains should reference voltagedomains. Thanks to Shweta Gulati <shweta.gulati@ti.com> for comments. Thanks to Rajendra Nayak <rnayak@ti.com> for finding and fixing some bugs that prevented OMAP4 from booting: https://patchwork.kernel.org/patch/587311/ His patch has been folded into this one to avoid breaking OMAP4 between patches. Thanks also to Kevin Hilman <khilman@ti.com> for finding and fixing a compile problem when !CONFIG_PM: http://www.spinics.net/lists/arm-kernel/msg118067.html His patch has also been folded into this one to avoid breaking !CONFIG_PM builds. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Shweta Gulati <shweta.gulati@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Kevin Hilman <khilman@ti.com>
172 lines
5.6 KiB
C
172 lines
5.6 KiB
C
/*
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* OMAP3 OPP table definitions.
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*
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* Copyright (C) 2009-2010 Texas Instruments Incorporated - http://www.ti.com/
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* Nishanth Menon
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* Kevin Hilman
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* Copyright (C) 2010-2011 Nokia Corporation.
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* Eduardo Valentin
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <plat/cpu.h>
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#include "control.h"
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#include "omap_opp_data.h"
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/* 34xx */
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/* VDD1 */
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#define OMAP3430_VDD_MPU_OPP1_UV 975000
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#define OMAP3430_VDD_MPU_OPP2_UV 1075000
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#define OMAP3430_VDD_MPU_OPP3_UV 1200000
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#define OMAP3430_VDD_MPU_OPP4_UV 1270000
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#define OMAP3430_VDD_MPU_OPP5_UV 1350000
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struct omap_volt_data omap34xx_vddmpu_volt_data[] = {
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VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c),
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VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c),
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VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18),
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VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18),
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VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18),
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VOLT_DATA_DEFINE(0, 0, 0, 0),
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};
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/* VDD2 */
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#define OMAP3430_VDD_CORE_OPP1_UV 975000
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#define OMAP3430_VDD_CORE_OPP2_UV 1050000
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#define OMAP3430_VDD_CORE_OPP3_UV 1150000
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struct omap_volt_data omap34xx_vddcore_volt_data[] = {
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VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c),
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VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c),
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VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18),
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VOLT_DATA_DEFINE(0, 0, 0, 0),
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};
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/* 36xx */
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/* VDD1 */
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#define OMAP3630_VDD_MPU_OPP50_UV 1012500
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#define OMAP3630_VDD_MPU_OPP100_UV 1200000
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#define OMAP3630_VDD_MPU_OPP120_UV 1325000
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#define OMAP3630_VDD_MPU_OPP1G_UV 1375000
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struct omap_volt_data omap36xx_vddmpu_volt_data[] = {
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VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c),
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VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16),
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VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23),
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VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27),
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VOLT_DATA_DEFINE(0, 0, 0, 0),
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};
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/* VDD2 */
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#define OMAP3630_VDD_CORE_OPP50_UV 1000000
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#define OMAP3630_VDD_CORE_OPP100_UV 1200000
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struct omap_volt_data omap36xx_vddcore_volt_data[] = {
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VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c),
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VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16),
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VOLT_DATA_DEFINE(0, 0, 0, 0),
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};
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/* OPP data */
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static struct omap_opp_def __initdata omap34xx_opp_def_list[] = {
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/* MPU OPP1 */
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OPP_INITIALIZER("mpu", true, 125000000, 975000),
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/* MPU OPP2 */
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OPP_INITIALIZER("mpu", true, 250000000, 1075000),
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/* MPU OPP3 */
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OPP_INITIALIZER("mpu", true, 500000000, 1200000),
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/* MPU OPP4 */
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OPP_INITIALIZER("mpu", true, 550000000, 1270000),
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/* MPU OPP5 */
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OPP_INITIALIZER("mpu", true, 600000000, 1350000),
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/*
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* L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is
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* almost the same than the one at 83MHz thus providing very little
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* gain for the power point of view. In term of energy it will even
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* increase the consumption due to the very negative performance
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* impact that frequency will do to the MPU and the whole system in
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* general.
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*/
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OPP_INITIALIZER("l3_main", false, 41500000, 975000),
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/* L3 OPP2 */
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OPP_INITIALIZER("l3_main", true, 83000000, 1050000),
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/* L3 OPP3 */
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OPP_INITIALIZER("l3_main", true, 166000000, 1150000),
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/* DSP OPP1 */
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OPP_INITIALIZER("iva", true, 90000000, 975000),
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/* DSP OPP2 */
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OPP_INITIALIZER("iva", true, 180000000, 1075000),
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/* DSP OPP3 */
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OPP_INITIALIZER("iva", true, 360000000, 1200000),
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/* DSP OPP4 */
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OPP_INITIALIZER("iva", true, 400000000, 1270000),
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/* DSP OPP5 */
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OPP_INITIALIZER("iva", true, 430000000, 1350000),
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};
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static struct omap_opp_def __initdata omap36xx_opp_def_list[] = {
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/* MPU OPP1 - OPP50 */
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OPP_INITIALIZER("mpu", true, 300000000, 1012500),
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/* MPU OPP2 - OPP100 */
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OPP_INITIALIZER("mpu", true, 600000000, 1200000),
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/* MPU OPP3 - OPP-Turbo */
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OPP_INITIALIZER("mpu", false, 800000000, 1325000),
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/* MPU OPP4 - OPP-SB */
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OPP_INITIALIZER("mpu", false, 1000000000, 1375000),
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/* L3 OPP1 - OPP50 */
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OPP_INITIALIZER("l3_main", true, 100000000, 1000000),
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/* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
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OPP_INITIALIZER("l3_main", true, 200000000, 1200000),
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/* DSP OPP1 - OPP50 */
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OPP_INITIALIZER("iva", true, 260000000, 1012500),
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/* DSP OPP2 - OPP100 */
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OPP_INITIALIZER("iva", true, 520000000, 1200000),
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/* DSP OPP3 - OPP-Turbo */
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OPP_INITIALIZER("iva", false, 660000000, 1325000),
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/* DSP OPP4 - OPP-SB */
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OPP_INITIALIZER("iva", false, 800000000, 1375000),
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};
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/**
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* omap3_opp_init() - initialize omap3 opp table
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*/
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static int __init omap3_opp_init(void)
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{
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int r = -ENODEV;
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if (!cpu_is_omap34xx())
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return r;
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if (cpu_is_omap3630())
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r = omap_init_opp_table(omap36xx_opp_def_list,
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ARRAY_SIZE(omap36xx_opp_def_list));
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else
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r = omap_init_opp_table(omap34xx_opp_def_list,
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ARRAY_SIZE(omap34xx_opp_def_list));
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return r;
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}
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device_initcall(omap3_opp_init);
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