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3ef7e6e019
The probe function doesn't make use of the i2c_device_id * parameter so it can be trivially converted. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20221118224540.619276-99-uwe@kleine-koenig.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
511 lines
12 KiB
C
511 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* max30100.c - Support for MAX30100 heart rate and pulse oximeter sensor
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*
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* Copyright (C) 2015, 2018
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* Author: Matt Ranostay <matt.ranostay@konsulko.com>
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*
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* TODO: enable pulse length controls via device tree properties
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/irq.h>
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#include <linux/i2c.h>
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#include <linux/mutex.h>
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#include <linux/property.h>
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#include <linux/regmap.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/kfifo_buf.h>
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#define MAX30100_REGMAP_NAME "max30100_regmap"
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#define MAX30100_DRV_NAME "max30100"
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#define MAX30100_REG_INT_STATUS 0x00
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#define MAX30100_REG_INT_STATUS_PWR_RDY BIT(0)
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#define MAX30100_REG_INT_STATUS_SPO2_RDY BIT(4)
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#define MAX30100_REG_INT_STATUS_HR_RDY BIT(5)
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#define MAX30100_REG_INT_STATUS_FIFO_RDY BIT(7)
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#define MAX30100_REG_INT_ENABLE 0x01
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#define MAX30100_REG_INT_ENABLE_SPO2_EN BIT(0)
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#define MAX30100_REG_INT_ENABLE_HR_EN BIT(1)
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#define MAX30100_REG_INT_ENABLE_FIFO_EN BIT(3)
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#define MAX30100_REG_INT_ENABLE_MASK 0xf0
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#define MAX30100_REG_INT_ENABLE_MASK_SHIFT 4
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#define MAX30100_REG_FIFO_WR_PTR 0x02
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#define MAX30100_REG_FIFO_OVR_CTR 0x03
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#define MAX30100_REG_FIFO_RD_PTR 0x04
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#define MAX30100_REG_FIFO_DATA 0x05
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#define MAX30100_REG_FIFO_DATA_ENTRY_COUNT 16
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#define MAX30100_REG_FIFO_DATA_ENTRY_LEN 4
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#define MAX30100_REG_MODE_CONFIG 0x06
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#define MAX30100_REG_MODE_CONFIG_MODE_SPO2_EN BIT(0)
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#define MAX30100_REG_MODE_CONFIG_MODE_HR_EN BIT(1)
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#define MAX30100_REG_MODE_CONFIG_MODE_MASK 0x03
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#define MAX30100_REG_MODE_CONFIG_TEMP_EN BIT(3)
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#define MAX30100_REG_MODE_CONFIG_PWR BIT(7)
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#define MAX30100_REG_SPO2_CONFIG 0x07
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#define MAX30100_REG_SPO2_CONFIG_100HZ BIT(2)
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#define MAX30100_REG_SPO2_CONFIG_HI_RES_EN BIT(6)
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#define MAX30100_REG_SPO2_CONFIG_1600US 0x3
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#define MAX30100_REG_LED_CONFIG 0x09
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#define MAX30100_REG_LED_CONFIG_LED_MASK 0x0f
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#define MAX30100_REG_LED_CONFIG_RED_LED_SHIFT 4
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#define MAX30100_REG_LED_CONFIG_24MA 0x07
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#define MAX30100_REG_LED_CONFIG_50MA 0x0f
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#define MAX30100_REG_TEMP_INTEGER 0x16
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#define MAX30100_REG_TEMP_FRACTION 0x17
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struct max30100_data {
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struct i2c_client *client;
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struct iio_dev *indio_dev;
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struct mutex lock;
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struct regmap *regmap;
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__be16 buffer[2]; /* 2 16-bit channels */
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};
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static bool max30100_is_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case MAX30100_REG_INT_STATUS:
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case MAX30100_REG_MODE_CONFIG:
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case MAX30100_REG_FIFO_WR_PTR:
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case MAX30100_REG_FIFO_OVR_CTR:
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case MAX30100_REG_FIFO_RD_PTR:
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case MAX30100_REG_FIFO_DATA:
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case MAX30100_REG_TEMP_INTEGER:
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case MAX30100_REG_TEMP_FRACTION:
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return true;
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default:
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return false;
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}
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}
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static const struct regmap_config max30100_regmap_config = {
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.name = MAX30100_REGMAP_NAME,
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = MAX30100_REG_TEMP_FRACTION,
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.cache_type = REGCACHE_FLAT,
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.volatile_reg = max30100_is_volatile_reg,
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};
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static const unsigned int max30100_led_current_mapping[] = {
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4400, 7600, 11000, 14200, 17400,
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20800, 24000, 27100, 30600, 33800,
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37000, 40200, 43600, 46800, 50000
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};
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static const unsigned long max30100_scan_masks[] = {0x3, 0};
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static const struct iio_chan_spec max30100_channels[] = {
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{
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.type = IIO_INTENSITY,
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.channel2 = IIO_MOD_LIGHT_IR,
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.modified = 1,
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.scan_index = 0,
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.scan_type = {
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.sign = 'u',
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.realbits = 16,
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.storagebits = 16,
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.endianness = IIO_BE,
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},
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},
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{
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.type = IIO_INTENSITY,
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.channel2 = IIO_MOD_LIGHT_RED,
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.modified = 1,
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.scan_index = 1,
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.scan_type = {
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.sign = 'u',
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.realbits = 16,
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.storagebits = 16,
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.endianness = IIO_BE,
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},
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},
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{
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.type = IIO_TEMP,
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.info_mask_separate =
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BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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.scan_index = -1,
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},
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};
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static int max30100_set_powermode(struct max30100_data *data, bool state)
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{
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return regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
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MAX30100_REG_MODE_CONFIG_PWR,
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state ? 0 : MAX30100_REG_MODE_CONFIG_PWR);
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}
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static int max30100_clear_fifo(struct max30100_data *data)
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{
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int ret;
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ret = regmap_write(data->regmap, MAX30100_REG_FIFO_WR_PTR, 0);
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if (ret)
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return ret;
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ret = regmap_write(data->regmap, MAX30100_REG_FIFO_OVR_CTR, 0);
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if (ret)
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return ret;
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return regmap_write(data->regmap, MAX30100_REG_FIFO_RD_PTR, 0);
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}
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static int max30100_buffer_postenable(struct iio_dev *indio_dev)
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{
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struct max30100_data *data = iio_priv(indio_dev);
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int ret;
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ret = max30100_set_powermode(data, true);
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if (ret)
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return ret;
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return max30100_clear_fifo(data);
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}
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static int max30100_buffer_predisable(struct iio_dev *indio_dev)
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{
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struct max30100_data *data = iio_priv(indio_dev);
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return max30100_set_powermode(data, false);
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}
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static const struct iio_buffer_setup_ops max30100_buffer_setup_ops = {
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.postenable = max30100_buffer_postenable,
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.predisable = max30100_buffer_predisable,
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};
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static inline int max30100_fifo_count(struct max30100_data *data)
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{
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unsigned int val;
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int ret;
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ret = regmap_read(data->regmap, MAX30100_REG_INT_STATUS, &val);
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if (ret)
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return ret;
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/* FIFO is almost full */
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if (val & MAX30100_REG_INT_STATUS_FIFO_RDY)
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return MAX30100_REG_FIFO_DATA_ENTRY_COUNT - 1;
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return 0;
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}
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static int max30100_read_measurement(struct max30100_data *data)
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{
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int ret;
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ret = i2c_smbus_read_i2c_block_data(data->client,
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MAX30100_REG_FIFO_DATA,
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MAX30100_REG_FIFO_DATA_ENTRY_LEN,
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(u8 *) &data->buffer);
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return (ret == MAX30100_REG_FIFO_DATA_ENTRY_LEN) ? 0 : ret;
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}
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static irqreturn_t max30100_interrupt_handler(int irq, void *private)
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{
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struct iio_dev *indio_dev = private;
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struct max30100_data *data = iio_priv(indio_dev);
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int ret, cnt = 0;
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mutex_lock(&data->lock);
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while (cnt || (cnt = max30100_fifo_count(data)) > 0) {
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ret = max30100_read_measurement(data);
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if (ret)
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break;
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iio_push_to_buffers(data->indio_dev, data->buffer);
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cnt--;
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}
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mutex_unlock(&data->lock);
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return IRQ_HANDLED;
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}
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static int max30100_get_current_idx(unsigned int val, int *reg)
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{
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int idx;
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/* LED turned off */
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if (val == 0) {
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*reg = 0;
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return 0;
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}
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for (idx = 0; idx < ARRAY_SIZE(max30100_led_current_mapping); idx++) {
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if (max30100_led_current_mapping[idx] == val) {
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*reg = idx + 1;
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return 0;
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}
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}
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return -EINVAL;
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}
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static int max30100_led_init(struct max30100_data *data)
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{
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struct device *dev = &data->client->dev;
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unsigned int val[2];
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int reg, ret;
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ret = device_property_read_u32_array(dev, "maxim,led-current-microamp",
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(unsigned int *) &val, 2);
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if (ret) {
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/* Default to 24 mA RED LED, 50 mA IR LED */
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reg = (MAX30100_REG_LED_CONFIG_24MA <<
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MAX30100_REG_LED_CONFIG_RED_LED_SHIFT) |
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MAX30100_REG_LED_CONFIG_50MA;
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dev_warn(dev, "no led-current-microamp set");
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return regmap_write(data->regmap, MAX30100_REG_LED_CONFIG, reg);
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}
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/* RED LED current */
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ret = max30100_get_current_idx(val[0], ®);
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if (ret) {
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dev_err(dev, "invalid RED current setting %d", val[0]);
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return ret;
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}
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ret = regmap_update_bits(data->regmap, MAX30100_REG_LED_CONFIG,
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MAX30100_REG_LED_CONFIG_LED_MASK <<
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MAX30100_REG_LED_CONFIG_RED_LED_SHIFT,
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reg << MAX30100_REG_LED_CONFIG_RED_LED_SHIFT);
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if (ret)
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return ret;
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/* IR LED current */
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ret = max30100_get_current_idx(val[1], ®);
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if (ret) {
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dev_err(dev, "invalid IR current setting %d", val[1]);
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return ret;
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}
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return regmap_update_bits(data->regmap, MAX30100_REG_LED_CONFIG,
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MAX30100_REG_LED_CONFIG_LED_MASK, reg);
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}
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static int max30100_chip_init(struct max30100_data *data)
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{
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int ret;
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/* setup LED current settings */
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ret = max30100_led_init(data);
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if (ret)
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return ret;
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/* enable hi-res SPO2 readings at 100Hz */
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ret = regmap_write(data->regmap, MAX30100_REG_SPO2_CONFIG,
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MAX30100_REG_SPO2_CONFIG_HI_RES_EN |
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MAX30100_REG_SPO2_CONFIG_100HZ);
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if (ret)
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return ret;
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/* enable SPO2 mode */
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ret = regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
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MAX30100_REG_MODE_CONFIG_MODE_MASK,
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MAX30100_REG_MODE_CONFIG_MODE_HR_EN |
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MAX30100_REG_MODE_CONFIG_MODE_SPO2_EN);
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if (ret)
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return ret;
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/* enable FIFO interrupt */
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return regmap_update_bits(data->regmap, MAX30100_REG_INT_ENABLE,
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MAX30100_REG_INT_ENABLE_MASK,
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MAX30100_REG_INT_ENABLE_FIFO_EN
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<< MAX30100_REG_INT_ENABLE_MASK_SHIFT);
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}
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static int max30100_read_temp(struct max30100_data *data, int *val)
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{
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int ret;
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unsigned int reg;
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ret = regmap_read(data->regmap, MAX30100_REG_TEMP_INTEGER, ®);
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if (ret < 0)
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return ret;
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*val = reg << 4;
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ret = regmap_read(data->regmap, MAX30100_REG_TEMP_FRACTION, ®);
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if (ret < 0)
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return ret;
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*val |= reg & 0xf;
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*val = sign_extend32(*val, 11);
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return 0;
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}
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static int max30100_get_temp(struct max30100_data *data, int *val)
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{
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int ret;
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/* start acquisition */
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ret = regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
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MAX30100_REG_MODE_CONFIG_TEMP_EN,
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MAX30100_REG_MODE_CONFIG_TEMP_EN);
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if (ret)
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return ret;
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msleep(35);
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return max30100_read_temp(data, val);
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}
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static int max30100_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct max30100_data *data = iio_priv(indio_dev);
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int ret = -EINVAL;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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/*
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* Temperature reading can only be acquired while engine
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* is running
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*/
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if (iio_device_claim_buffer_mode(indio_dev)) {
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/*
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* Replacing -EBUSY or other error code
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* returned by iio_device_claim_buffer_mode()
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* because user space may rely on the current
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* one.
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*/
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ret = -EAGAIN;
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} else {
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ret = max30100_get_temp(data, val);
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if (!ret)
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ret = IIO_VAL_INT;
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iio_device_release_buffer_mode(indio_dev);
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}
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break;
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case IIO_CHAN_INFO_SCALE:
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*val = 1; /* 0.0625 */
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*val2 = 16;
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ret = IIO_VAL_FRACTIONAL;
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break;
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}
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return ret;
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}
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static const struct iio_info max30100_info = {
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.read_raw = max30100_read_raw,
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};
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static int max30100_probe(struct i2c_client *client)
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{
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struct max30100_data *data;
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struct iio_dev *indio_dev;
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int ret;
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indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
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if (!indio_dev)
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return -ENOMEM;
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indio_dev->name = MAX30100_DRV_NAME;
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indio_dev->channels = max30100_channels;
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indio_dev->info = &max30100_info;
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indio_dev->num_channels = ARRAY_SIZE(max30100_channels);
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indio_dev->available_scan_masks = max30100_scan_masks;
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indio_dev->modes = INDIO_DIRECT_MODE;
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ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev,
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&max30100_buffer_setup_ops);
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if (ret)
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return ret;
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data = iio_priv(indio_dev);
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data->indio_dev = indio_dev;
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data->client = client;
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mutex_init(&data->lock);
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i2c_set_clientdata(client, indio_dev);
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data->regmap = devm_regmap_init_i2c(client, &max30100_regmap_config);
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if (IS_ERR(data->regmap)) {
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dev_err(&client->dev, "regmap initialization failed.\n");
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return PTR_ERR(data->regmap);
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}
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max30100_set_powermode(data, false);
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ret = max30100_chip_init(data);
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if (ret)
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return ret;
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if (client->irq <= 0) {
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dev_err(&client->dev, "no valid irq defined\n");
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return -EINVAL;
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}
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ret = devm_request_threaded_irq(&client->dev, client->irq,
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NULL, max30100_interrupt_handler,
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IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
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"max30100_irq", indio_dev);
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if (ret) {
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dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
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return ret;
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}
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return iio_device_register(indio_dev);
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}
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static void max30100_remove(struct i2c_client *client)
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{
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struct iio_dev *indio_dev = i2c_get_clientdata(client);
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struct max30100_data *data = iio_priv(indio_dev);
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iio_device_unregister(indio_dev);
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max30100_set_powermode(data, false);
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}
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static const struct i2c_device_id max30100_id[] = {
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{ "max30100", 0 },
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{}
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};
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MODULE_DEVICE_TABLE(i2c, max30100_id);
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static const struct of_device_id max30100_dt_ids[] = {
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{ .compatible = "maxim,max30100" },
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{ }
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|
};
|
|
MODULE_DEVICE_TABLE(of, max30100_dt_ids);
|
|
|
|
static struct i2c_driver max30100_driver = {
|
|
.driver = {
|
|
.name = MAX30100_DRV_NAME,
|
|
.of_match_table = max30100_dt_ids,
|
|
},
|
|
.probe_new = max30100_probe,
|
|
.remove = max30100_remove,
|
|
.id_table = max30100_id,
|
|
};
|
|
module_i2c_driver(max30100_driver);
|
|
|
|
MODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>");
|
|
MODULE_DESCRIPTION("MAX30100 heart rate and pulse oximeter sensor");
|
|
MODULE_LICENSE("GPL");
|