Amit Daniel Kachhap c00a19c8b1 ARM: 9268/1: vfp: Add hwcap FPHP and ASIMDHP for FEAT_FP16 ... Floating point half-precision (FPHP) and Advanced SIMD half-precision (ASIMDHP) are VFP features (FEAT_FP16) represented by MVFR1 identification register. These capabilities can optionally exist with VFPv3 and mandatory with VFPv4. Both these new features exist for Armv8 architecture in AArch32 state. These hwcaps may be useful for the userspace to add conditional check before trying to use FEAT_FP16 feature specific instructions. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>		2022-11-28 11:57:32 +00:00
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entry.S	ARM: 9044/1: vfp: use undef hook for VFP support detection	2020-12-21 11:19:19 +00:00
Makefile	ARM: 8989/1: use .fpu assembler directives instead of assembler arguments	2020-07-21 16:33:37 +01:00
vfp.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
vfpdouble.c
vfphw.S	printk: Userspace format indexing support	2021-07-19 11:57:48 +02:00
vfpinstr.h	ARM: 8991/1: use VFP assembler mnemonics if available	2020-07-21 16:33:39 +01:00
vfpmodule.c	ARM: 9268/1: vfp: Add hwcap FPHP and ASIMDHP for FEAT_FP16	2022-11-28 11:57:32 +00:00
vfpsingle.c