Harry Wentland bfdec23404 drm/amd/display: Implement dm_pp_get_clock_levels_by_type_with_latency ... This is required so we use the correct minimum clocks for Vega. Without this pplib will never be able to enter the lowest clock states. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-05-25 11:01:49 -05:00
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drm	drm/amd/display: Implement dm_pp_get_clock_levels_by_type_with_latency	2018-05-25 11:01:49 -05:00
host1x	gpu: host1x: Use not explicitly sized types	2018-05-18 21:51:37 +02:00
ipu-v3	gpu: ipu-v3: prg: avoid possible array underflow	2018-03-15 17:52:08 +01:00
vga	vga_switcheroo: Let HDA autosuspend on mux change	2018-03-13 22:58:49 +01:00
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