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fcde5a7eca
If platform is embedded with memory more than 3GB, the address will go out of the scope that 32-bit can handle with. This patch sets the dma_mask and MSB properly to describe its address to 33-bit. Signed-off-by: Hidalgo Huang <hidalgo.huang@mediatek.com> Signed-off-by: PC Liao <pc.liao@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
102 lines
2.1 KiB
C
102 lines
2.1 KiB
C
/*
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* mtk_afe_common.h -- Mediatek audio driver common definitions
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*
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* Copyright (c) 2015 MediaTek Inc.
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* Author: Koro Chen <koro.chen@mediatek.com>
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* Sascha Hauer <s.hauer@pengutronix.de>
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* Hidalgo Huang <hidalgo.huang@mediatek.com>
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* Ir Lian <ir.lian@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _MTK_AFE_COMMON_H_
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#define _MTK_AFE_COMMON_H_
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#include <linux/clk.h>
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#include <linux/regmap.h>
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enum {
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MTK_AFE_MEMIF_DL1,
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MTK_AFE_MEMIF_DL2,
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MTK_AFE_MEMIF_VUL,
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MTK_AFE_MEMIF_DAI,
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MTK_AFE_MEMIF_AWB,
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MTK_AFE_MEMIF_MOD_DAI,
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MTK_AFE_MEMIF_HDMI,
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MTK_AFE_MEMIF_NUM,
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MTK_AFE_IO_MOD_PCM1 = MTK_AFE_MEMIF_NUM,
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MTK_AFE_IO_MOD_PCM2,
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MTK_AFE_IO_PMIC,
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MTK_AFE_IO_I2S,
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MTK_AFE_IO_2ND_I2S,
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MTK_AFE_IO_HW_GAIN1,
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MTK_AFE_IO_HW_GAIN2,
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MTK_AFE_IO_MRG_O,
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MTK_AFE_IO_MRG_I,
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MTK_AFE_IO_DAIBT,
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MTK_AFE_IO_HDMI,
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};
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enum {
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MTK_AFE_IRQ_1,
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MTK_AFE_IRQ_2,
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MTK_AFE_IRQ_3,
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MTK_AFE_IRQ_4,
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MTK_AFE_IRQ_5,
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MTK_AFE_IRQ_6,
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MTK_AFE_IRQ_7,
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MTK_AFE_IRQ_8,
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MTK_AFE_IRQ_NUM,
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};
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enum {
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MTK_CLK_INFRASYS_AUD,
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MTK_CLK_TOP_PDN_AUD,
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MTK_CLK_TOP_PDN_AUD_BUS,
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MTK_CLK_I2S0_M,
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MTK_CLK_I2S1_M,
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MTK_CLK_I2S2_M,
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MTK_CLK_I2S3_M,
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MTK_CLK_I2S3_B,
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MTK_CLK_BCK0,
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MTK_CLK_BCK1,
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MTK_CLK_NUM
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};
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struct mtk_afe;
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struct snd_pcm_substream;
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struct mtk_afe_memif_data {
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int id;
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const char *name;
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int reg_ofs_base;
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int reg_ofs_cur;
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int fs_shift;
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int mono_shift;
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int enable_shift;
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int irq_reg_cnt;
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int irq_cnt_shift;
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int irq_en_shift;
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int irq_fs_shift;
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int irq_clr_shift;
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int msb_shift;
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};
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struct mtk_afe_memif {
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unsigned int phys_buf_addr;
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int buffer_size;
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struct snd_pcm_substream *substream;
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const struct mtk_afe_memif_data *data;
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const struct mtk_afe_irq_data *irqdata;
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};
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#endif
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