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Now that mbus has been added to the device tree, it's possible to move the PCIe nodes out of the ocp node, placing it directly below the mbus. This is a more accurate representation of the hardware. Moving the PCIe nodes, we now need to introduce an extra cell to encode the window target ID and attribute. Since this depends on the PCIe port, we split the ranges translation entries, to correspond to each MBus window. In addition, we encode the PCIe memory and I/O apertures in the MBus node, according to the MBus DT binding specification. The choice made is 0xe0000000-0xf0000000 for memory space, and 0xf200000-0xf2100000 for I/O space. These apertures can be changed in each per-board DT file. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
32 lines
718 B
Plaintext
32 lines
718 B
Plaintext
/*
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* Marvell DB-88F6281-BP Development Board Setup
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*
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* Saeed Bishara <saeed@marvell.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/dts-v1/;
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#include "kirkwood-db.dtsi"
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#include "kirkwood-6281.dtsi"
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/ {
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model = "Marvell DB-88F6281-BP Development Board";
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compatible = "marvell,db-88f6281-bp", "marvell,kirkwood-88f6281", "marvell,kirkwood";
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mbus {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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status = "okay";
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};
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};
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};
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};
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