Palmer Dabbelt bf73055273 RISC-V: remove spin_unlock_wait() ... This was removed from the other architectures in commit 952111d7db ("arch: Remove spin_unlock_wait() arch-specific definitions"). That landed between when we got upstream and when our patches were reviewed, so this is a followup patch. Signed-off-by: Palmer Dabbelt <palmer@sifive.com>		2017-11-28 14:06:31 -08:00
..
asm-offsets.h
asm.h
atomic.h	RISC-V: Comment on why {,cmp}xchg is ordered how it is	2017-11-28 14:03:29 -08:00
barrier.h	RISC-V: Remove smb_mb__{before,after}_spinlock()	2017-11-28 14:03:55 -08:00
bitops.h	RISC-V: __test_and_op_bit_ord should be strongly ordered	2017-11-28 14:04:05 -08:00
bug.h
cache.h
cacheflush.h
cmpxchg.h
compat.h
csr.h
current.h
delay.h
dma-mapping.h
elf.h
hwcap.h
io.h
irq.h
irqflags.h
Kbuild
kprobes.h
linkage.h
mmu_context.h
mmu.h
page.h
pci.h
pgalloc.h
pgtable-32.h
pgtable-64.h
pgtable-bits.h
pgtable.h
processor.h
ptrace.h
sbi.h
smp.h
spinlock_types.h
spinlock.h	RISC-V: remove spin_unlock_wait()	2017-11-28 14:06:31 -08:00
string.h
switch_to.h
syscall.h
thread_info.h
timex.h
tlb.h
tlbflush.h	RISC-V: sfence.vma orderes the instruction cache	2017-11-28 14:06:17 -08:00
uaccess.h
unistd.h
vdso.h
word-at-a-time.h