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Wireless statistics produced by the RTL8187B driver are not particularly informative about the strength of the received signal. From the data sheet provided by Realtek, I discovered that certain parts of the RX header should have the information necessary to calculate signal quality and strength. With testing, it became clear that most of these quantities were very jittery - only the AGC correlated with the signals expected from nearby AP's. As a result, the quality and strength are derived from the agc value. The scaling has been determined so that the numbers are close to those obtained by b43 under the same conditions. The results are qualitatively correct. Statistics derived for the RTL8187 have not been changed. The RX header variables have been renamed to match the quantites described in the Realtek data sheet. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
224 lines
5.1 KiB
C
224 lines
5.1 KiB
C
/*
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* Definitions for RTL8187 hardware
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*
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* Copyright 2007 Michael Wu <flamingice@sourmilk.net>
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* Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
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*
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* Based on the r8187 driver, which is:
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* Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef RTL8187_H
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#define RTL8187_H
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#include "rtl818x.h"
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#define RTL8187_EEPROM_TXPWR_BASE 0x05
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#define RTL8187_EEPROM_MAC_ADDR 0x07
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#define RTL8187_EEPROM_TXPWR_CHAN_1 0x16 /* 3 channels */
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#define RTL8187_EEPROM_TXPWR_CHAN_6 0x1B /* 2 channels */
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#define RTL8187_EEPROM_TXPWR_CHAN_4 0x3D /* 2 channels */
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#define RTL8187_REQT_READ 0xC0
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#define RTL8187_REQT_WRITE 0x40
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#define RTL8187_REQ_GET_REG 0x05
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#define RTL8187_REQ_SET_REG 0x05
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#define RTL8187_MAX_RX 0x9C4
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struct rtl8187_rx_info {
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struct urb *urb;
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struct ieee80211_hw *dev;
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};
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struct rtl8187_rx_hdr {
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__le32 flags;
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u8 noise;
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u8 signal;
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u8 agc;
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u8 reserved;
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__le64 mac_time;
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} __attribute__((packed));
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struct rtl8187b_rx_hdr {
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__le32 flags;
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__le64 mac_time;
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u8 sq;
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u8 rssi;
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u8 agc;
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u8 flags2;
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__le16 snr_long2end;
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s8 pwdb_g12;
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u8 fot;
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} __attribute__((packed));
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/* {rtl8187,rtl8187b}_tx_info is in skb */
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/* Tx flags are common between rtl8187 and rtl8187b */
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#define RTL8187_TX_FLAG_NO_ENCRYPT (1 << 15)
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#define RTL8187_TX_FLAG_MORE_FRAG (1 << 17)
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#define RTL8187_TX_FLAG_CTS (1 << 18)
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#define RTL8187_TX_FLAG_RTS (1 << 23)
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struct rtl8187_tx_hdr {
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__le32 flags;
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__le16 rts_duration;
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__le16 len;
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__le32 retry;
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} __attribute__((packed));
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struct rtl8187b_tx_hdr {
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__le32 flags;
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__le16 rts_duration;
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__le16 len;
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__le32 unused_1;
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__le16 unused_2;
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__le16 tx_duration;
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__le32 unused_3;
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__le32 retry;
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__le32 unused_4[2];
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} __attribute__((packed));
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enum {
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DEVICE_RTL8187,
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DEVICE_RTL8187B
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};
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struct rtl8187_priv {
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/* common between rtl818x drivers */
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struct rtl818x_csr *map;
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const struct rtl818x_rf_ops *rf;
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struct ieee80211_vif *vif;
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int mode;
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/* rtl8187 specific */
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struct ieee80211_channel channels[14];
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struct ieee80211_rate rates[12];
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struct ieee80211_supported_band band;
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struct usb_device *udev;
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u32 rx_conf;
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u16 txpwr_base;
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u16 seqno;
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u8 asic_rev;
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u8 is_rtl8187b;
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enum {
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RTL8187BvB,
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RTL8187BvD,
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RTL8187BvE
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} hw_rev;
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struct sk_buff_head rx_queue;
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u8 signal;
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u8 quality;
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u8 noise;
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};
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void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);
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static inline u8 rtl818x_ioread8_idx(struct rtl8187_priv *priv,
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u8 *addr, u8 idx)
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{
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u8 val;
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usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
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RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
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(unsigned long)addr, idx & 0x03, &val,
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sizeof(val), HZ / 2);
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return val;
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}
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static inline u8 rtl818x_ioread8(struct rtl8187_priv *priv, u8 *addr)
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{
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return rtl818x_ioread8_idx(priv, addr, 0);
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}
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static inline u16 rtl818x_ioread16_idx(struct rtl8187_priv *priv,
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__le16 *addr, u8 idx)
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{
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__le16 val;
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usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
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RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
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(unsigned long)addr, idx & 0x03, &val,
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sizeof(val), HZ / 2);
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return le16_to_cpu(val);
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}
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static inline u16 rtl818x_ioread16(struct rtl8187_priv *priv, __le16 *addr)
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{
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return rtl818x_ioread16_idx(priv, addr, 0);
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}
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static inline u32 rtl818x_ioread32_idx(struct rtl8187_priv *priv,
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__le32 *addr, u8 idx)
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{
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__le32 val;
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usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
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RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
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(unsigned long)addr, idx & 0x03, &val,
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sizeof(val), HZ / 2);
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return le32_to_cpu(val);
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}
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static inline u32 rtl818x_ioread32(struct rtl8187_priv *priv, __le32 *addr)
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{
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return rtl818x_ioread32_idx(priv, addr, 0);
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}
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static inline void rtl818x_iowrite8_idx(struct rtl8187_priv *priv,
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u8 *addr, u8 val, u8 idx)
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{
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usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
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RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
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(unsigned long)addr, idx & 0x03, &val,
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sizeof(val), HZ / 2);
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}
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static inline void rtl818x_iowrite8(struct rtl8187_priv *priv, u8 *addr, u8 val)
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{
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rtl818x_iowrite8_idx(priv, addr, val, 0);
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}
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static inline void rtl818x_iowrite16_idx(struct rtl8187_priv *priv,
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__le16 *addr, u16 val, u8 idx)
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{
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__le16 buf = cpu_to_le16(val);
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usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
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RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
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(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
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HZ / 2);
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}
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static inline void rtl818x_iowrite16(struct rtl8187_priv *priv, __le16 *addr,
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u16 val)
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{
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rtl818x_iowrite16_idx(priv, addr, val, 0);
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}
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static inline void rtl818x_iowrite32_idx(struct rtl8187_priv *priv,
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__le32 *addr, u32 val, u8 idx)
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{
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__le32 buf = cpu_to_le32(val);
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usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
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RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
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(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
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HZ / 2);
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}
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static inline void rtl818x_iowrite32(struct rtl8187_priv *priv, __le32 *addr,
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u32 val)
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{
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rtl818x_iowrite32_idx(priv, addr, val, 0);
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}
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#endif /* RTL8187_H */
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