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284901a90a
Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32) Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
314 lines
8.1 KiB
C
314 lines
8.1 KiB
C
/*
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* Functions to handle I2O memory
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*
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* Pulled from the inlines in i2o headers and uninlined
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/i2o.h>
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#include <linux/delay.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include "core.h"
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/* Protects our 32/64bit mask switching */
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static DEFINE_MUTEX(mem_lock);
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/**
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* i2o_sg_tablesize - Calculate the maximum number of elements in a SGL
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* @c: I2O controller for which the calculation should be done
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* @body_size: maximum body size used for message in 32-bit words.
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*
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* Return the maximum number of SG elements in a SG list.
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*/
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u16 i2o_sg_tablesize(struct i2o_controller *c, u16 body_size)
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{
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i2o_status_block *sb = c->status_block.virt;
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u16 sg_count =
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(sb->inbound_frame_size - sizeof(struct i2o_message) / 4) -
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body_size;
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if (c->pae_support) {
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/*
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* for 64-bit a SG attribute element must be added and each
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* SG element needs 12 bytes instead of 8.
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*/
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sg_count -= 2;
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sg_count /= 3;
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} else
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sg_count /= 2;
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if (c->short_req && (sg_count > 8))
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sg_count = 8;
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return sg_count;
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}
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EXPORT_SYMBOL_GPL(i2o_sg_tablesize);
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/**
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* i2o_dma_map_single - Map pointer to controller and fill in I2O message.
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* @c: I2O controller
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* @ptr: pointer to the data which should be mapped
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* @size: size of data in bytes
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* @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE
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* @sg_ptr: pointer to the SG list inside the I2O message
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*
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* This function does all necessary DMA handling and also writes the I2O
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* SGL elements into the I2O message. For details on DMA handling see also
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* dma_map_single(). The pointer sg_ptr will only be set to the end of the
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* SG list if the allocation was successful.
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*
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* Returns DMA address which must be checked for failures using
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* dma_mapping_error().
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*/
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dma_addr_t i2o_dma_map_single(struct i2o_controller *c, void *ptr,
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size_t size,
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enum dma_data_direction direction,
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u32 ** sg_ptr)
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{
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u32 sg_flags;
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u32 *mptr = *sg_ptr;
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dma_addr_t dma_addr;
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switch (direction) {
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case DMA_TO_DEVICE:
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sg_flags = 0xd4000000;
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break;
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case DMA_FROM_DEVICE:
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sg_flags = 0xd0000000;
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break;
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default:
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return 0;
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}
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dma_addr = dma_map_single(&c->pdev->dev, ptr, size, direction);
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if (!dma_mapping_error(&c->pdev->dev, dma_addr)) {
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#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
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if ((sizeof(dma_addr_t) > 4) && c->pae_support) {
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*mptr++ = cpu_to_le32(0x7C020002);
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*mptr++ = cpu_to_le32(PAGE_SIZE);
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}
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#endif
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*mptr++ = cpu_to_le32(sg_flags | size);
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*mptr++ = cpu_to_le32(i2o_dma_low(dma_addr));
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#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
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if ((sizeof(dma_addr_t) > 4) && c->pae_support)
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*mptr++ = cpu_to_le32(i2o_dma_high(dma_addr));
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#endif
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*sg_ptr = mptr;
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}
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return dma_addr;
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}
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EXPORT_SYMBOL_GPL(i2o_dma_map_single);
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/**
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* i2o_dma_map_sg - Map a SG List to controller and fill in I2O message.
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* @c: I2O controller
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* @sg: SG list to be mapped
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* @sg_count: number of elements in the SG list
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* @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE
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* @sg_ptr: pointer to the SG list inside the I2O message
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*
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* This function does all necessary DMA handling and also writes the I2O
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* SGL elements into the I2O message. For details on DMA handling see also
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* dma_map_sg(). The pointer sg_ptr will only be set to the end of the SG
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* list if the allocation was successful.
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*
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* Returns 0 on failure or 1 on success.
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*/
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int i2o_dma_map_sg(struct i2o_controller *c, struct scatterlist *sg,
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int sg_count, enum dma_data_direction direction, u32 ** sg_ptr)
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{
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u32 sg_flags;
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u32 *mptr = *sg_ptr;
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switch (direction) {
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case DMA_TO_DEVICE:
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sg_flags = 0x14000000;
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break;
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case DMA_FROM_DEVICE:
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sg_flags = 0x10000000;
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break;
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default:
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return 0;
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}
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sg_count = dma_map_sg(&c->pdev->dev, sg, sg_count, direction);
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if (!sg_count)
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return 0;
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#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
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if ((sizeof(dma_addr_t) > 4) && c->pae_support) {
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*mptr++ = cpu_to_le32(0x7C020002);
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*mptr++ = cpu_to_le32(PAGE_SIZE);
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}
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#endif
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while (sg_count-- > 0) {
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if (!sg_count)
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sg_flags |= 0xC0000000;
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*mptr++ = cpu_to_le32(sg_flags | sg_dma_len(sg));
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*mptr++ = cpu_to_le32(i2o_dma_low(sg_dma_address(sg)));
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#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
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if ((sizeof(dma_addr_t) > 4) && c->pae_support)
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*mptr++ = cpu_to_le32(i2o_dma_high(sg_dma_address(sg)));
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#endif
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sg = sg_next(sg);
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}
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*sg_ptr = mptr;
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return 1;
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}
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EXPORT_SYMBOL_GPL(i2o_dma_map_sg);
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/**
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* i2o_dma_alloc - Allocate DMA memory
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* @dev: struct device pointer to the PCI device of the I2O controller
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* @addr: i2o_dma struct which should get the DMA buffer
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* @len: length of the new DMA memory
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*
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* Allocate a coherent DMA memory and write the pointers into addr.
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*
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* Returns 0 on success or -ENOMEM on failure.
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*/
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int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr, size_t len)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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int dma_64 = 0;
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mutex_lock(&mem_lock);
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if ((sizeof(dma_addr_t) > 4) && (pdev->dma_mask == DMA_BIT_MASK(64))) {
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dma_64 = 1;
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if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
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mutex_unlock(&mem_lock);
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return -ENOMEM;
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}
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}
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addr->virt = dma_alloc_coherent(dev, len, &addr->phys, GFP_KERNEL);
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if ((sizeof(dma_addr_t) > 4) && dma_64)
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if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
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printk(KERN_WARNING "i2o: unable to set 64-bit DMA");
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mutex_unlock(&mem_lock);
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if (!addr->virt)
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return -ENOMEM;
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memset(addr->virt, 0, len);
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addr->len = len;
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return 0;
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}
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EXPORT_SYMBOL_GPL(i2o_dma_alloc);
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/**
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* i2o_dma_free - Free DMA memory
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* @dev: struct device pointer to the PCI device of the I2O controller
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* @addr: i2o_dma struct which contains the DMA buffer
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*
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* Free a coherent DMA memory and set virtual address of addr to NULL.
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*/
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void i2o_dma_free(struct device *dev, struct i2o_dma *addr)
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{
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if (addr->virt) {
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if (addr->phys)
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dma_free_coherent(dev, addr->len, addr->virt,
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addr->phys);
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else
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kfree(addr->virt);
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addr->virt = NULL;
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}
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}
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EXPORT_SYMBOL_GPL(i2o_dma_free);
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/**
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* i2o_dma_realloc - Realloc DMA memory
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* @dev: struct device pointer to the PCI device of the I2O controller
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* @addr: pointer to a i2o_dma struct DMA buffer
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* @len: new length of memory
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*
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* If there was something allocated in the addr, free it first. If len > 0
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* than try to allocate it and write the addresses back to the addr
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* structure. If len == 0 set the virtual address to NULL.
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*
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* Returns the 0 on success or negative error code on failure.
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*/
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int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr, size_t len)
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{
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i2o_dma_free(dev, addr);
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if (len)
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return i2o_dma_alloc(dev, addr, len);
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return 0;
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}
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EXPORT_SYMBOL_GPL(i2o_dma_realloc);
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/*
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* i2o_pool_alloc - Allocate an slab cache and mempool
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* @mempool: pointer to struct i2o_pool to write data into.
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* @name: name which is used to identify cache
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* @size: size of each object
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* @min_nr: minimum number of objects
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*
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* First allocates a slab cache with name and size. Then allocates a
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* mempool which uses the slab cache for allocation and freeing.
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*
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* Returns 0 on success or negative error code on failure.
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*/
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int i2o_pool_alloc(struct i2o_pool *pool, const char *name,
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size_t size, int min_nr)
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{
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pool->name = kmalloc(strlen(name) + 1, GFP_KERNEL);
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if (!pool->name)
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goto exit;
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strcpy(pool->name, name);
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pool->slab =
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kmem_cache_create(pool->name, size, 0, SLAB_HWCACHE_ALIGN, NULL);
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if (!pool->slab)
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goto free_name;
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pool->mempool = mempool_create_slab_pool(min_nr, pool->slab);
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if (!pool->mempool)
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goto free_slab;
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return 0;
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free_slab:
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kmem_cache_destroy(pool->slab);
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free_name:
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kfree(pool->name);
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exit:
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return -ENOMEM;
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}
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EXPORT_SYMBOL_GPL(i2o_pool_alloc);
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/*
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* i2o_pool_free - Free slab cache and mempool again
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* @mempool: pointer to struct i2o_pool which should be freed
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*
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* Note that you have to return all objects to the mempool again before
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* calling i2o_pool_free().
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*/
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void i2o_pool_free(struct i2o_pool *pool)
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{
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mempool_destroy(pool->mempool);
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kmem_cache_destroy(pool->slab);
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kfree(pool->name);
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};
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EXPORT_SYMBOL_GPL(i2o_pool_free);
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