Ville Syrjala 3149be50d3 sm501: add support for the SM502 programmable PLL ... SM502 has a programmable PLL which can provide the panel pixel clock instead of the 288MHz and 336MHz PLLs. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Ville Syrjala <syrjala@sci.fi> Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>		2008-03-04 16:35:13 -08:00
..
asic3.c	ASIC3 driver	2008-02-07 08:42:23 -08:00
Kconfig	ASIC3 driver	2008-02-07 08:42:23 -08:00
Makefile	ASIC3 driver	2008-02-07 08:42:23 -08:00
mcp-core.c	some kmalloc/memset ->kzalloc (tree wide)	2007-07-19 10:04:50 -07:00
mcp-sa11x0.c	[DRIVER MODEL] Convert platform drivers to use struct platform_driver	2005-11-09 22:32:44 +00:00
mcp.h
sm501.c	sm501: add support for the SM502 programmable PLL	2008-03-04 16:35:13 -08:00
ucb1x00-assabet.c	[ARM] Fix class_device damage caused by 0c55445f20	2008-01-28 10:59:09 +00:00
ucb1x00-core.c	MCP_UCB1200: Convert from class_device to device	2008-01-24 20:40:06 -08:00
ucb1x00-ts.c	Freezer: make kernel threads nonfreezable by default	2007-07-17 10:23:02 -07:00
ucb1x00.h	MCP_UCB1200: Convert from class_device to device	2008-01-24 20:40:06 -08:00