Matan Barak 2d93fc8569 IB/mlx5: Add ability to hash by IPSEC_SPI when creating a TIR ... When a Raw Ethernet QP is created, we actually create a few objects. One of these objects is a TIR. Currently, a TIR could hash (and spread the traffic) by IP or port only. Adding a hashing by IPSec SPI to TIR creation with the required UAPI bit. Signed-off-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>		2018-04-04 12:06:28 -06:00
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ah.c	IB/mlx5: Enable ECN capable bits for UD RoCE v2 QPs	2018-03-27 14:43:10 -06:00
cmd.c	IB/mlx5: Fix congestion counters in LAG mode	2017-12-21 16:06:07 -07:00
cmd.h	IB/mlx5: Fix congestion counters in LAG mode	2017-12-21 16:06:07 -07:00
cong.c	IB/mlx5: Change debugfs to have per port contents	2018-01-08 11:42:22 -07:00
cq.c	Merge branch 'k.o/wip/dl-for-rc' into k.o/wip/dl-for-next	2018-03-14 19:28:58 -04:00
doorbell.c	IB/mlx5: Fix Mellanox copyright note	2015-04-02 16:33:42 -04:00
gsi.c	IB/mlx5: Fix iteration overrun in GSI qps	2016-08-02 14:32:51 -04:00
ib_rep.c	Merge branch 'k.o/wip/dl-for-rc' into k.o/wip/dl-for-next	2018-03-14 19:28:58 -04:00
ib_rep.h	IB/mlx5: Add proper representors support	2018-02-23 12:36:39 -08:00
ib_virt.c	IB/mlx5: Restore IB guid/policy for virtual functions	2017-07-24 10:34:28 -04:00
Kconfig	net/mlx5: Extend mlx5_core to support ConnectX-4 Ethernet functionality	2015-05-30 18:24:51 -07:00
mad.c	IB/mlx5: Route MADs for dual port RoCE	2018-01-08 11:42:23 -07:00
main.c	IB/mlx5: Add ability to hash by IPSEC_SPI when creating a TIR	2018-04-04 12:06:28 -06:00
Makefile	IB/mlx5: Add basic regiser/unregister representors code	2018-02-23 12:36:39 -08:00
mem.c	IB/mlx5: Simplify mlx5_ib_cont_pages	2017-09-25 11:47:24 -04:00
mlx5_ib.h	IB/mlx5: Add IPsec support for egress and ingress	2018-04-04 12:06:27 -06:00
mr.c	IB/mlx5: Respect new UMR capabilities	2018-03-27 14:43:10 -06:00
odp.c	IB/mlx5: Move locks initialization to the corresponding stage	2018-01-03 17:26:59 -07:00
qp.c	IB/mlx5: Add ability to hash by IPSEC_SPI when creating a TIR	2018-04-04 12:06:28 -06:00
srq.c	IB/mlx5: Fix integer overflows in mlx5_ib_create_srq	2018-03-13 16:31:21 -04:00