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1aaf179d04
Currently, when the physical resume CPU is not equal to the physical suspend CPU, we swap the CPUs logically, by modifying the logical/physical CPU mapping. This has two major drawbacks: First the change is visible from user space (e.g. CPU sysfs files) and second it is hard to ensure that nowhere in the kernel the physical CPU ID is stored before suspend. To fix this, we now really swap the physical CPUs, if the resume CPU is not the pysical suspend CPU. We restart the suspend CPU and stop the resume CPU using SIGP restart and SIGP stop. If the suspend CPU is no longer available, we write a message and load a disabled wait PSW. Signed-off-by: Michael Holzheu <michael.holzheu@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
325 lines
7.3 KiB
ArmAsm
325 lines
7.3 KiB
ArmAsm
/*
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* Mini SCLP driver.
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*
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* Copyright IBM Corp. 2004,2009
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*
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* Author(s): Peter Oberparleiter <Peter.Oberparleiter@de.ibm.com>,
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* Heiko Carstens <heiko.carstens@de.ibm.com>,
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*
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*/
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LC_EXT_NEW_PSW = 0x58 # addr of ext int handler
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LC_EXT_INT_PARAM = 0x80 # addr of ext int parameter
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LC_EXT_INT_CODE = 0x86 # addr of ext int code
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#
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# Subroutine which waits synchronously until either an external interruption
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# or a timeout occurs.
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#
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# Parameters:
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# R2 = 0 for no timeout, non-zero for timeout in (approximated) seconds
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#
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# Returns:
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# R2 = 0 on interrupt, 2 on timeout
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# R3 = external interruption parameter if R2=0
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#
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_sclp_wait_int:
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stm %r6,%r15,24(%r15) # save registers
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basr %r13,0 # get base register
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.LbaseS1:
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ahi %r15,-96 # create stack frame
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la %r8,LC_EXT_NEW_PSW # register int handler
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mvc .LoldpswS1-.LbaseS1(8,%r13),0(%r8)
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mvc 0(8,%r8),.LextpswS1-.LbaseS1(%r13)
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lhi %r6,0x0200 # cr mask for ext int (cr0.54)
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ltr %r2,%r2
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jz .LsetctS1
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ahi %r6,0x0800 # cr mask for clock int (cr0.52)
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stck .LtimeS1-.LbaseS1(%r13) # initiate timeout
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al %r2,.LtimeS1-.LbaseS1(%r13)
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st %r2,.LtimeS1-.LbaseS1(%r13)
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sckc .LtimeS1-.LbaseS1(%r13)
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.LsetctS1:
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stctl %c0,%c0,.LctlS1-.LbaseS1(%r13) # enable required interrupts
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l %r0,.LctlS1-.LbaseS1(%r13)
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lhi %r1,~(0x200 | 0x800) # clear old values
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nr %r1,%r0
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or %r1,%r6 # set new value
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st %r1,.LctlS1-.LbaseS1(%r13)
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lctl %c0,%c0,.LctlS1-.LbaseS1(%r13)
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st %r0,.LctlS1-.LbaseS1(%r13)
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lhi %r2,2 # return code for timeout
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.LloopS1:
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lpsw .LwaitpswS1-.LbaseS1(%r13) # wait until interrupt
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.LwaitS1:
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lh %r7,LC_EXT_INT_CODE
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chi %r7,0x1004 # timeout?
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je .LtimeoutS1
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chi %r7,0x2401 # service int?
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jne .LloopS1
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sr %r2,%r2
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l %r3,LC_EXT_INT_PARAM
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.LtimeoutS1:
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lctl %c0,%c0,.LctlS1-.LbaseS1(%r13) # restore interrupt setting
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# restore old handler
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mvc 0(8,%r8),.LoldpswS1-.LbaseS1(%r13)
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lm %r6,%r15,120(%r15) # restore registers
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br %r14 # return to caller
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.align 8
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.LoldpswS1:
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.long 0, 0 # old ext int PSW
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.LextpswS1:
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.long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int
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.LwaitpswS1:
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.long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int
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.LtimeS1:
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.quad 0 # current time
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.LctlS1:
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.long 0 # CT0 contents
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#
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# Subroutine to synchronously issue a service call.
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#
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# Parameters:
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# R2 = command word
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# R3 = sccb address
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#
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# Returns:
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# R2 = 0 on success, 1 on failure
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# R3 = sccb response code if R2 = 0
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#
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_sclp_servc:
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stm %r6,%r15,24(%r15) # save registers
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ahi %r15,-96 # create stack frame
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lr %r6,%r2 # save command word
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lr %r7,%r3 # save sccb address
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.LretryS2:
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lhi %r2,1 # error return code
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.insn rre,0xb2200000,%r6,%r7 # servc
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brc 1,.LendS2 # exit if not operational
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brc 8,.LnotbusyS2 # go on if not busy
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sr %r2,%r2 # wait until no longer busy
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bras %r14,_sclp_wait_int
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j .LretryS2 # retry
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.LnotbusyS2:
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sr %r2,%r2 # wait until result
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bras %r14,_sclp_wait_int
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sr %r2,%r2
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lh %r3,6(%r7)
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.LendS2:
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lm %r6,%r15,120(%r15) # restore registers
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br %r14
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#
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# Subroutine to set up the SCLP interface.
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#
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# Parameters:
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# R2 = 0 to activate, non-zero to deactivate
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#
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# Returns:
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# R2 = 0 on success, non-zero on failure
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#
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_sclp_setup:
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stm %r6,%r15,24(%r15) # save registers
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ahi %r15,-96 # create stack frame
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basr %r13,0 # get base register
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.LbaseS3:
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l %r6,.LsccbS0-.LbaseS3(%r13) # prepare init mask sccb
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mvc 0(.LinitendS3-.LinitsccbS3,%r6),.LinitsccbS3-.LbaseS3(%r13)
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ltr %r2,%r2 # initialization?
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jz .LdoinitS3 # go ahead
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# clear masks
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xc .LinitmaskS3-.LinitsccbS3(8,%r6),.LinitmaskS3-.LinitsccbS3(%r6)
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.LdoinitS3:
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l %r2,.LwritemaskS3-.LbaseS3(%r13)# get command word
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lr %r3,%r6 # get sccb address
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bras %r14,_sclp_servc # issue service call
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ltr %r2,%r2 # servc successful?
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jnz .LerrorS3
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chi %r3,0x20 # write mask successful?
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jne .LerrorS3
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# check masks
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la %r2,.LinitmaskS3-.LinitsccbS3(%r6)
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l %r1,0(%r2) # receive mask ok?
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n %r1,12(%r2)
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cl %r1,0(%r2)
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jne .LerrorS3
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l %r1,4(%r2) # send mask ok?
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n %r1,8(%r2)
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cl %r1,4(%r2)
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sr %r2,%r2
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je .LendS3
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.LerrorS3:
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lhi %r2,1 # error return code
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.LendS3:
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lm %r6,%r15,120(%r15) # restore registers
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br %r14
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.LwritemaskS3:
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.long 0x00780005 # SCLP command for write mask
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.LinitsccbS3:
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.word .LinitendS3-.LinitsccbS3
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.byte 0,0,0,0
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.word 0
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.word 0
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.word 4
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.LinitmaskS3:
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.long 0x80000000
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.long 0x40000000
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.long 0
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.long 0
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.LinitendS3:
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#
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# Subroutine which prints a given text to the SCLP console.
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#
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# Parameters:
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# R2 = address of nil-terminated ASCII text
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#
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# Returns:
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# R2 = 0 on success, 1 on failure
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#
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_sclp_print:
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stm %r6,%r15,24(%r15) # save registers
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ahi %r15,-96 # create stack frame
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basr %r13,0 # get base register
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.LbaseS4:
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l %r8,.LsccbS0-.LbaseS4(%r13) # prepare write data sccb
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mvc 0(.LmtoS4-.LwritesccbS4,%r8),.LwritesccbS4-.LbaseS4(%r13)
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la %r7,.LmtoS4-.LwritesccbS4(%r8) # current mto addr
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sr %r0,%r0
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l %r10,.Lascebc-.LbaseS4(%r13) # address of translation table
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.LinitmtoS4:
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# initialize mto
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mvc 0(.LmtoendS4-.LmtoS4,%r7),.LmtoS4-.LbaseS4(%r13)
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lhi %r6,.LmtoendS4-.LmtoS4 # current mto length
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.LloopS4:
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ic %r0,0(%r2) # get character
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ahi %r2,1
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ltr %r0,%r0 # end of string?
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jz .LfinalizemtoS4
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chi %r0,0x15 # end of line (NL)?
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jz .LfinalizemtoS4
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stc %r0,0(%r6,%r7) # copy to mto
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la %r11,0(%r6,%r7)
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tr 0(1,%r11),0(%r10) # translate to EBCDIC
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ahi %r6,1
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j .LloopS4
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.LfinalizemtoS4:
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sth %r6,0(%r7) # update mto length
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lh %r9,.LmdbS4-.LwritesccbS4(%r8) # update mdb length
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ar %r9,%r6
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sth %r9,.LmdbS4-.LwritesccbS4(%r8)
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lh %r9,.LevbufS4-.LwritesccbS4(%r8)# update evbuf length
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ar %r9,%r6
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sth %r9,.LevbufS4-.LwritesccbS4(%r8)
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lh %r9,0(%r8) # update sccb length
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ar %r9,%r6
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sth %r9,0(%r8)
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ar %r7,%r6 # update current mto adress
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ltr %r0,%r0 # more characters?
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jnz .LinitmtoS4
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l %r2,.LwritedataS4-.LbaseS4(%r13)# write data
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lr %r3,%r8
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bras %r14,_sclp_servc
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ltr %r2,%r2 # servc successful?
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jnz .LendS4
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chi %r3,0x20 # write data successful?
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je .LendS4
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lhi %r2,1 # error return code
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.LendS4:
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lm %r6,%r15,120(%r15) # restore registers
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br %r14
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#
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# Function which prints a given text to the SCLP console.
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#
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# Parameters:
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# R2 = address of nil-terminated ASCII text
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#
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# Returns:
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# R2 = 0 on success, 1 on failure
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#
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.globl _sclp_print_early
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_sclp_print_early:
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stm %r6,%r15,24(%r15) # save registers
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ahi %r15,-96 # create stack frame
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lr %r10,%r2 # save string pointer
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lhi %r2,0
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bras %r14,_sclp_setup # enable console
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ltr %r2,%r2
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jnz .LendS5
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lr %r2,%r10
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bras %r14,_sclp_print # print string
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ltr %r2,%r2
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jnz .LendS5
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lhi %r2,1
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bras %r14,_sclp_setup # disable console
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.LendS5:
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lm %r6,%r15,120(%r15) # restore registers
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br %r14
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.LwritedataS4:
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.long 0x00760005 # SCLP command for write data
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.LwritesccbS4:
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# sccb
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.word .LmtoS4-.LwritesccbS4
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.byte 0
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.byte 0,0,0
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.word 0
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# evbuf
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.LevbufS4:
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.word .LmtoS4-.LevbufS4
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.byte 0x02
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.byte 0
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.word 0
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.LmdbS4:
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# mdb
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.word .LmtoS4-.LmdbS4
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.word 1
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.long 0xd4c4c240
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.long 1
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# go
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.LgoS4:
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.word .LmtoS4-.LgoS4
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.word 1
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.long 0
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.byte 0,0,0,0,0,0,0,0
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.byte 0,0,0
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.byte 0
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.byte 0,0,0,0,0,0,0
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.byte 0
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.word 0
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.byte 0,0,0,0,0,0,0,0,0,0
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.byte 0,0,0,0,0,0,0,0
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.byte 0,0,0,0,0,0,0,0
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.LmtoS4:
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.word .LmtoendS4-.LmtoS4
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.word 4
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.word 0x1000
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.byte 0
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.byte 0,0,0
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.LmtoendS4:
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# Global constants
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.LsccbS0:
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.long _sclp_work_area
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.Lascebc:
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.long _ascebc
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.section .data,"aw",@progbits
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.balign 4096
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_sclp_work_area:
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.fill 4096
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.previous
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