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1c96fcdef8
Use the new 'compatible' property for simple cases. checkpatch complains about the new compatible being undocumented but in reality nothing is new so just ignore it for the time being. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/6cb9865d916231c38401ba34ad1a98c249fae135.1676711562.git.christophe.leroy@csgroup.eu
171 lines
4.2 KiB
C
171 lines
4.2 KiB
C
/*
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* Platform setup for the Embedded Planet EP88xC board
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*
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* Author: Scott Wood <scottwood@freescale.com>
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* Copyright 2007 Freescale Semiconductor, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/init.h>
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#include <linux/of_address.h>
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#include <linux/of_fdt.h>
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#include <linux/of_platform.h>
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#include <asm/machdep.h>
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#include <asm/io.h>
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#include <asm/udbg.h>
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#include <asm/cpm1.h>
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#include "mpc8xx.h"
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#include "pic.h"
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struct cpm_pin {
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int port, pin, flags;
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};
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static struct cpm_pin ep88xc_pins[] = {
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/* SMC1 */
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{1, 24, CPM_PIN_INPUT}, /* RX */
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{1, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
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/* SCC2 */
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{0, 12, CPM_PIN_INPUT}, /* TX */
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{0, 13, CPM_PIN_INPUT}, /* RX */
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{2, 8, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CD */
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{2, 9, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CTS */
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{2, 14, CPM_PIN_INPUT}, /* RTS */
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/* MII1 */
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{0, 0, CPM_PIN_INPUT},
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{0, 1, CPM_PIN_INPUT},
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{0, 2, CPM_PIN_INPUT},
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{0, 3, CPM_PIN_INPUT},
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{0, 4, CPM_PIN_OUTPUT},
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{0, 10, CPM_PIN_OUTPUT},
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{0, 11, CPM_PIN_OUTPUT},
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{1, 19, CPM_PIN_INPUT},
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{1, 31, CPM_PIN_INPUT},
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{2, 12, CPM_PIN_INPUT},
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{2, 13, CPM_PIN_INPUT},
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{3, 8, CPM_PIN_INPUT},
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{4, 30, CPM_PIN_OUTPUT},
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{4, 31, CPM_PIN_OUTPUT},
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/* MII2 */
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{4, 14, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{4, 15, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{4, 16, CPM_PIN_OUTPUT},
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{4, 17, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{4, 18, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{4, 19, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{4, 20, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{4, 21, CPM_PIN_OUTPUT},
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{4, 22, CPM_PIN_OUTPUT},
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{4, 23, CPM_PIN_OUTPUT},
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{4, 24, CPM_PIN_OUTPUT},
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{4, 25, CPM_PIN_OUTPUT},
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{4, 26, CPM_PIN_OUTPUT},
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{4, 27, CPM_PIN_OUTPUT},
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{4, 28, CPM_PIN_OUTPUT},
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{4, 29, CPM_PIN_OUTPUT},
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/* USB */
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{0, 6, CPM_PIN_INPUT}, /* CLK2 */
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{0, 14, CPM_PIN_INPUT}, /* USBOE */
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{0, 15, CPM_PIN_INPUT}, /* USBRXD */
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{2, 6, CPM_PIN_OUTPUT}, /* USBTXN */
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{2, 7, CPM_PIN_OUTPUT}, /* USBTXP */
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{2, 10, CPM_PIN_INPUT}, /* USBRXN */
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{2, 11, CPM_PIN_INPUT}, /* USBRXP */
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/* Misc */
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{1, 26, CPM_PIN_INPUT}, /* BRGO2 */
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{1, 27, CPM_PIN_INPUT}, /* BRGO1 */
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};
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static void __init init_ioports(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(ep88xc_pins); i++) {
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struct cpm_pin *pin = &ep88xc_pins[i];
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cpm1_set_pin(pin->port, pin->pin, pin->flags);
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}
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cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
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cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_TX); /* USB */
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cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX);
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cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
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cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
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}
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static u8 __iomem *ep88xc_bcsr;
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#define BCSR7_SCC2_ENABLE 0x10
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#define BCSR8_PHY1_ENABLE 0x80
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#define BCSR8_PHY1_POWER 0x40
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#define BCSR8_PHY2_ENABLE 0x20
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#define BCSR8_PHY2_POWER 0x10
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#define BCSR9_USB_ENABLE 0x80
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#define BCSR9_USB_POWER 0x40
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#define BCSR9_USB_HOST 0x20
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#define BCSR9_USB_FULL_SPEED_TARGET 0x10
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static void __init ep88xc_setup_arch(void)
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{
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struct device_node *np;
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cpm_reset();
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init_ioports();
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np = of_find_compatible_node(NULL, NULL, "fsl,ep88xc-bcsr");
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if (!np) {
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printk(KERN_CRIT "Could not find fsl,ep88xc-bcsr node\n");
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return;
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}
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ep88xc_bcsr = of_iomap(np, 0);
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of_node_put(np);
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if (!ep88xc_bcsr) {
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printk(KERN_CRIT "Could not remap BCSR\n");
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return;
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}
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setbits8(&ep88xc_bcsr[7], BCSR7_SCC2_ENABLE);
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setbits8(&ep88xc_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER |
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BCSR8_PHY2_ENABLE | BCSR8_PHY2_POWER);
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}
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static const struct of_device_id of_bus_ids[] __initconst = {
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{ .name = "soc", },
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{ .name = "cpm", },
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{ .name = "localbus", },
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{},
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};
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static int __init declare_of_platform_devices(void)
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{
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/* Publish the QE devices */
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of_platform_bus_probe(NULL, of_bus_ids, NULL);
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return 0;
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}
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machine_device_initcall(ep88xc, declare_of_platform_devices);
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define_machine(ep88xc) {
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.name = "Embedded Planet EP88xC",
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.compatible = "fsl,ep88xc",
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.setup_arch = ep88xc_setup_arch,
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.init_IRQ = mpc8xx_pic_init,
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.get_irq = mpc8xx_get_irq,
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.restart = mpc8xx_restart,
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.calibrate_decr = mpc8xx_calibrate_decr,
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.progress = udbg_progress,
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};
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