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bbe4f634f4
My earlier patch removed __weak function declarations that used to be
turned into wild branches by the linker, instead causing a link failure
when the called functions are unavailable:
mips-linux-ld: arch/mips/mm/cache.o: in function `cpu_cache_init':
cache.c:(.text+0x670): undefined reference to `r3k_cache_init'
The __weak method seems suboptimal, so rather than putting that back, make
the function calls conditional on the Kconfig symbol that controls the
compilation.
[akpm@linux-foundation.org: fix whitespace while we're in there]
Link: https://lkml.kernel.org/r/20231214205506.310402-1-arnd@kernel.org
Fixes: 66445677f0 ("mips: move cache declarations into header")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reported-by: kernelci.org bot <bot@kernelci.org>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Zi Yan <ziy@nvidia.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
218 lines
6.1 KiB
C
218 lines
6.1 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994 - 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
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* Copyright (C) 2007 MIPS Technologies, Inc.
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*/
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#include <linux/fs.h>
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#include <linux/fcntl.h>
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#include <linux/kernel.h>
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#include <linux/linkage.h>
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#include <linux/export.h>
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#include <linux/sched.h>
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#include <linux/syscalls.h>
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#include <linux/mm.h>
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#include <linux/highmem.h>
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#include <linux/pagemap.h>
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#include <asm/bcache.h>
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#include <asm/cacheflush.h>
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#include <asm/processor.h>
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#include <asm/cpu.h>
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#include <asm/cpu-features.h>
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#include <asm/setup.h>
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#include <asm/pgtable.h>
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/* Cache operations. */
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void (*flush_cache_all)(void);
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void (*__flush_cache_all)(void);
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EXPORT_SYMBOL_GPL(__flush_cache_all);
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void (*flush_cache_mm)(struct mm_struct *mm);
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void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
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unsigned long end);
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void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
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unsigned long pfn);
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void (*flush_icache_range)(unsigned long start, unsigned long end);
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EXPORT_SYMBOL_GPL(flush_icache_range);
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void (*local_flush_icache_range)(unsigned long start, unsigned long end);
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EXPORT_SYMBOL_GPL(local_flush_icache_range);
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void (*__flush_icache_user_range)(unsigned long start, unsigned long end);
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void (*__local_flush_icache_user_range)(unsigned long start, unsigned long end);
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EXPORT_SYMBOL_GPL(__local_flush_icache_user_range);
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void (*__flush_cache_vmap)(void);
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void (*__flush_cache_vunmap)(void);
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void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size);
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EXPORT_SYMBOL_GPL(__flush_kernel_vmap_range);
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/* MIPS specific cache operations */
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void (*flush_data_cache_page)(unsigned long addr);
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void (*flush_icache_all)(void);
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EXPORT_SYMBOL(flush_data_cache_page);
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EXPORT_SYMBOL(flush_icache_all);
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/*
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* Dummy cache handling routine
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*/
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void cache_noop(void) {}
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#ifdef CONFIG_BOARD_SCACHE
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static struct bcache_ops no_sc_ops = {
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.bc_enable = (void *)cache_noop,
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.bc_disable = (void *)cache_noop,
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.bc_wback_inv = (void *)cache_noop,
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.bc_inv = (void *)cache_noop
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};
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struct bcache_ops *bcops = &no_sc_ops;
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#endif
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#ifdef CONFIG_DMA_NONCOHERENT
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/* DMA cache operations. */
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void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
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void (*_dma_cache_wback)(unsigned long start, unsigned long size);
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void (*_dma_cache_inv)(unsigned long start, unsigned long size);
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#endif /* CONFIG_DMA_NONCOHERENT */
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/*
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* We could optimize the case where the cache argument is not BCACHE but
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* that seems very atypical use ...
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*/
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SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,
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unsigned int, cache)
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{
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if (bytes == 0)
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return 0;
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if (!access_ok((void __user *) addr, bytes))
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return -EFAULT;
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__flush_icache_user_range(addr, addr + bytes);
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return 0;
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}
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void __flush_dcache_pages(struct page *page, unsigned int nr)
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{
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struct folio *folio = page_folio(page);
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struct address_space *mapping = folio_flush_mapping(folio);
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unsigned long addr;
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unsigned int i;
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if (mapping && !mapping_mapped(mapping)) {
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folio_set_dcache_dirty(folio);
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return;
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}
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/*
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* We could delay the flush for the !page_mapping case too. But that
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* case is for exec env/arg pages and those are %99 certainly going to
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* get faulted into the tlb (and thus flushed) anyways.
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*/
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for (i = 0; i < nr; i++) {
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addr = (unsigned long)kmap_local_page(nth_page(page, i));
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flush_data_cache_page(addr);
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kunmap_local((void *)addr);
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}
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}
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EXPORT_SYMBOL(__flush_dcache_pages);
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void __flush_anon_page(struct page *page, unsigned long vmaddr)
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{
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unsigned long addr = (unsigned long) page_address(page);
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struct folio *folio = page_folio(page);
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if (pages_do_alias(addr, vmaddr)) {
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if (folio_mapped(folio) && !folio_test_dcache_dirty(folio)) {
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void *kaddr;
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kaddr = kmap_coherent(page, vmaddr);
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flush_data_cache_page((unsigned long)kaddr);
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kunmap_coherent();
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} else
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flush_data_cache_page(addr);
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}
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}
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EXPORT_SYMBOL(__flush_anon_page);
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void __update_cache(unsigned long address, pte_t pte)
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{
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struct folio *folio;
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unsigned long pfn, addr;
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int exec = !pte_no_exec(pte) && !cpu_has_ic_fills_f_dc;
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unsigned int i;
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pfn = pte_pfn(pte);
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if (unlikely(!pfn_valid(pfn)))
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return;
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folio = page_folio(pfn_to_page(pfn));
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address &= PAGE_MASK;
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address -= offset_in_folio(folio, pfn << PAGE_SHIFT);
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if (folio_test_dcache_dirty(folio)) {
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for (i = 0; i < folio_nr_pages(folio); i++) {
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addr = (unsigned long)kmap_local_folio(folio, i);
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if (exec || pages_do_alias(addr, address))
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flush_data_cache_page(addr);
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kunmap_local((void *)addr);
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address += PAGE_SIZE;
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}
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folio_clear_dcache_dirty(folio);
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}
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}
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unsigned long _page_cachable_default;
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EXPORT_SYMBOL(_page_cachable_default);
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#define PM(p) __pgprot(_page_cachable_default | (p))
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static pgprot_t protection_map[16] __ro_after_init;
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DECLARE_VM_GET_PAGE_PROT
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static inline void setup_protection_map(void)
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{
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protection_map[0] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
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protection_map[1] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC);
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protection_map[2] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
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protection_map[3] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC);
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protection_map[4] = PM(_PAGE_PRESENT);
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protection_map[5] = PM(_PAGE_PRESENT);
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protection_map[6] = PM(_PAGE_PRESENT);
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protection_map[7] = PM(_PAGE_PRESENT);
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protection_map[8] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
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protection_map[9] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC);
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protection_map[10] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE |
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_PAGE_NO_READ);
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protection_map[11] = PM(_PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE);
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protection_map[12] = PM(_PAGE_PRESENT);
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protection_map[13] = PM(_PAGE_PRESENT);
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protection_map[14] = PM(_PAGE_PRESENT | _PAGE_WRITE);
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protection_map[15] = PM(_PAGE_PRESENT | _PAGE_WRITE);
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}
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#undef PM
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void cpu_cache_init(void)
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{
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if (IS_ENABLED(CONFIG_CPU_R3000) && cpu_has_3k_cache)
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r3k_cache_init();
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if (IS_ENABLED(CONFIG_CPU_R4K_CACHE_TLB) && cpu_has_4k_cache)
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r4k_cache_init();
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if (IS_ENABLED(CONFIG_CPU_CAVIUM_OCTEON) && cpu_has_octeon_cache)
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octeon_cache_init();
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setup_protection_map();
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}
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