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bb9f8692f5
This driver supports Intel's full MAC wireless multicomm 802.11 hardware. Although the hardware is a 802.11agn device, we currently only support 802.11ag, in managed and ad-hoc mode (no AP mode for now). Signed-off-by: Zhu Yi <yi.zhu@intel.com> Signed-off-by: Samuel Ortiz <samuel.ortiz@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
389 lines
11 KiB
C
389 lines
11 KiB
C
/*
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* Intel Wireless Multicomm 3200 WiFi driver
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*
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* Copyright (C) 2009 Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*
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* Intel Corporation <ilw@linux.intel.com>
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* Samuel Ortiz <samuel.ortiz@intel.com>
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* Zhu Yi <yi.zhu@intel.com>
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*
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*/
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#include <linux/kernel.h>
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#include <linux/firmware.h>
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#include "iwm.h"
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#include "bus.h"
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#include "hal.h"
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#include "umac.h"
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#include "debug.h"
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#include "fw.h"
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#include "commands.h"
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static const char fw_barker[] = "*WESTOPFORNOONE*";
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/*
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* @op_code: Op code we're looking for.
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* @index: There can be several instances of the same opcode within
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* the firmware. Index specifies which one we're looking for.
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*/
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static int iwm_fw_op_offset(struct iwm_priv *iwm, const struct firmware *fw,
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u16 op_code, u32 index)
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{
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int offset = -EINVAL, fw_offset;
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u32 op_index = 0;
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const u8 *fw_ptr;
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struct iwm_fw_hdr_rec *rec;
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fw_offset = 0;
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fw_ptr = fw->data;
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/* We first need to look for the firmware barker */
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if (memcmp(fw_ptr, fw_barker, IWM_HDR_BARKER_LEN)) {
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IWM_ERR(iwm, "No barker string in this FW\n");
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return -EINVAL;
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}
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if (fw->size < IWM_HDR_LEN) {
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IWM_ERR(iwm, "FW is too small (%d)\n", fw->size);
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return -EINVAL;
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}
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fw_offset += IWM_HDR_BARKER_LEN;
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while (fw_offset < fw->size) {
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rec = (struct iwm_fw_hdr_rec *)(fw_ptr + fw_offset);
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IWM_DBG_FW(iwm, DBG, "FW: op_code: 0x%x, len: %d @ 0x%x\n",
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rec->op_code, rec->len, fw_offset);
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if (rec->op_code == IWM_HDR_REC_OP_INVALID) {
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IWM_DBG_FW(iwm, DBG, "Reached INVALID op code\n");
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break;
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}
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if (rec->op_code == op_code) {
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if (op_index == index) {
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fw_offset += sizeof(struct iwm_fw_hdr_rec);
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offset = fw_offset;
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goto out;
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}
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op_index++;
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}
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fw_offset += sizeof(struct iwm_fw_hdr_rec) + rec->len;
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}
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out:
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return offset;
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}
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static int iwm_load_firmware_chunk(struct iwm_priv *iwm,
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const struct firmware *fw,
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struct iwm_fw_img_desc *img_desc)
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{
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struct iwm_udma_nonwifi_cmd target_cmd;
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u32 chunk_size;
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const u8 *chunk_ptr;
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int ret = 0;
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IWM_DBG_FW(iwm, INFO, "Loading FW chunk: %d bytes @ 0x%x\n",
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img_desc->length, img_desc->address);
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target_cmd.opcode = UMAC_HDI_OUT_OPCODE_WRITE;
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target_cmd.handle_by_hw = 1;
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target_cmd.op2 = 0;
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target_cmd.resp = 0;
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target_cmd.eop = 1;
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chunk_size = img_desc->length;
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chunk_ptr = fw->data + img_desc->offset;
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while (chunk_size > 0) {
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u32 tmp_chunk_size;
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tmp_chunk_size = min_t(u32, chunk_size,
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IWM_MAX_NONWIFI_CMD_BUFF_SIZE);
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target_cmd.addr = cpu_to_le32(img_desc->address +
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(chunk_ptr - fw->data - img_desc->offset));
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target_cmd.op1_sz = cpu_to_le32(tmp_chunk_size);
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IWM_DBG_FW(iwm, DBG, "\t%d bytes @ 0x%x\n",
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tmp_chunk_size, target_cmd.addr);
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ret = iwm_hal_send_target_cmd(iwm, &target_cmd, chunk_ptr);
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if (ret < 0) {
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IWM_ERR(iwm, "Couldn't load FW chunk\n");
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break;
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}
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chunk_size -= tmp_chunk_size;
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chunk_ptr += tmp_chunk_size;
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}
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return ret;
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}
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/*
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* To load a fw image to the target, we basically go through the
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* fw, looking for OP_MEM_DESC records. Once we found one, we
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* pass it to iwm_load_firmware_chunk().
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* The OP_MEM_DESC records contain the actuall memory chunk to be
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* sent, but also the destination address.
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*/
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static int iwm_load_img(struct iwm_priv *iwm, const char *img_name)
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{
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const struct firmware *fw;
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struct iwm_fw_img_desc *img_desc;
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struct iwm_fw_img_ver *ver;
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int ret = 0, fw_offset;
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u32 opcode_idx = 0, build_date;
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char *build_tag;
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ret = request_firmware(&fw, img_name, iwm_to_dev(iwm));
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if (ret) {
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IWM_ERR(iwm, "Request firmware failed");
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return ret;
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}
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IWM_DBG_FW(iwm, INFO, "Start to load FW %s\n", img_name);
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while (1) {
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fw_offset = iwm_fw_op_offset(iwm, fw,
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IWM_HDR_REC_OP_MEM_DESC,
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opcode_idx);
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if (fw_offset < 0)
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break;
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img_desc = (struct iwm_fw_img_desc *)(fw->data + fw_offset);
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ret = iwm_load_firmware_chunk(iwm, fw, img_desc);
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if (ret < 0)
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goto err_release_fw;
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opcode_idx++;
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};
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/* Read firmware version */
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fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_SW_VER, 0);
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if (fw_offset < 0)
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goto err_release_fw;
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ver = (struct iwm_fw_img_ver *)(fw->data + fw_offset);
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/* Read build tag */
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fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_TAG, 0);
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if (fw_offset < 0)
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goto err_release_fw;
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build_tag = (char *)(fw->data + fw_offset);
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/* Read build date */
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fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_DATE, 0);
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if (fw_offset < 0)
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goto err_release_fw;
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build_date = *(u32 *)(fw->data + fw_offset);
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IWM_INFO(iwm, "%s:\n", img_name);
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IWM_INFO(iwm, "\tVersion: %02X.%02X\n", ver->major, ver->minor);
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IWM_INFO(iwm, "\tBuild tag: %s\n", build_tag);
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IWM_INFO(iwm, "\tBuild date: %x-%x-%x\n",
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IWM_BUILD_YEAR(build_date), IWM_BUILD_MONTH(build_date),
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IWM_BUILD_DAY(build_date));
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err_release_fw:
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release_firmware(fw);
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return ret;
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}
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static int iwm_load_umac(struct iwm_priv *iwm)
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{
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struct iwm_udma_nonwifi_cmd target_cmd;
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int ret;
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ret = iwm_load_img(iwm, iwm->bus_ops->umac_name);
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if (ret < 0)
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return ret;
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/* We've loaded the UMAC, we can tell the target to jump there */
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target_cmd.opcode = UMAC_HDI_OUT_OPCODE_JUMP;
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target_cmd.addr = cpu_to_le32(UMAC_MU_FW_INST_DATA_12_ADDR);
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target_cmd.op1_sz = 0;
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target_cmd.op2 = 0;
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target_cmd.handle_by_hw = 0;
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target_cmd.resp = 1 ;
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target_cmd.eop = 1;
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ret = iwm_hal_send_target_cmd(iwm, &target_cmd, NULL);
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if (ret < 0)
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IWM_ERR(iwm, "Couldn't send JMP command\n");
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return ret;
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}
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static int iwm_load_lmac(struct iwm_priv *iwm, const char *img_name)
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{
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int ret;
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ret = iwm_load_img(iwm, img_name);
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if (ret < 0)
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return ret;
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return iwm_send_umac_reset(iwm,
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cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_CLK_EN), 0);
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}
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/*
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* We currently have to load 3 FWs:
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* 1) The UMAC (Upper MAC).
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* 2) The calibration LMAC (Lower MAC).
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* We then send the calibration init command, so that the device can
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* run a first calibration round.
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* 3) The operational LMAC, which replaces the calibration one when it's
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* done with the first calibration round.
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*
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* Once those 3 FWs have been loaded, we send the periodic calibration
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* command, and then the device is available for regular 802.11 operations.
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*/
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int iwm_load_fw(struct iwm_priv *iwm)
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{
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int ret;
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/* We first start downloading the UMAC */
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ret = iwm_load_umac(iwm);
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if (ret < 0) {
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IWM_ERR(iwm, "UMAC loading failed\n");
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return ret;
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}
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/* Handle UMAC_ALIVE notification */
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ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_ALIVE, IWM_SRC_UMAC,
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WAIT_NOTIF_TIMEOUT);
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if (ret) {
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IWM_ERR(iwm, "Handle UMAC_ALIVE failed: %d\n", ret);
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return ret;
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}
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/* UMAC is alive, we can download the calibration LMAC */
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ret = iwm_load_lmac(iwm, iwm->bus_ops->calib_lmac_name);
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if (ret) {
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IWM_ERR(iwm, "Calibration LMAC loading failed\n");
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return ret;
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}
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/* Handle UMAC_INIT_COMPLETE notification */
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ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE,
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IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
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if (ret) {
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IWM_ERR(iwm, "Handle INIT_COMPLETE failed for calibration "
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"LMAC: %d\n", ret);
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return ret;
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}
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/* Read EEPROM data */
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ret = iwm_eeprom_init(iwm);
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if (ret < 0) {
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IWM_ERR(iwm, "Couldn't init eeprom array\n");
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return ret;
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}
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#ifdef CONFIG_IWM_B0_HW_SUPPORT
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if (iwm->conf.hw_b0) {
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clear_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->conf.init_calib_map);
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clear_bit(PHY_CALIBRATE_RX_IQ_CMD,
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&iwm->conf.periodic_calib_map);
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}
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#endif
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/* Read RX IQ calibration result from EEPROM */
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if (test_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->conf.init_calib_map)) {
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iwm_store_rxiq_calib_result(iwm);
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set_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->calib_done_map);
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}
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iwm_send_prio_table(iwm);
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iwm_send_init_calib_cfg(iwm, iwm->conf.init_calib_map);
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while (iwm->calib_done_map != iwm->conf.init_calib_map) {
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ret = iwm_notif_handle(iwm, CALIBRATION_RES_NOTIFICATION,
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IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT);
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if (ret) {
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IWM_ERR(iwm, "Wait for calibration result timeout\n");
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goto out;
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}
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IWM_DBG_FW(iwm, DBG, "Got calibration result. calib_done_map: "
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"0x%lx, requested calibrations: 0x%lx\n",
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iwm->calib_done_map, iwm->conf.init_calib_map);
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}
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/* Handle LMAC CALIBRATION_COMPLETE notification */
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ret = iwm_notif_handle(iwm, CALIBRATION_COMPLETE_NOTIFICATION,
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IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT);
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if (ret) {
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IWM_ERR(iwm, "Wait for CALIBRATION_COMPLETE timeout\n");
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goto out;
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}
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IWM_INFO(iwm, "LMAC calibration done: 0x%lx\n", iwm->calib_done_map);
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iwm_send_umac_reset(iwm, cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_RESET), 1);
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ret = iwm_notif_handle(iwm, UMAC_CMD_OPCODE_RESET, IWM_SRC_UMAC,
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WAIT_NOTIF_TIMEOUT);
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if (ret) {
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IWM_ERR(iwm, "Wait for UMAC RESET timeout\n");
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goto out;
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}
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/* Download the operational LMAC */
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ret = iwm_load_lmac(iwm, iwm->bus_ops->lmac_name);
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if (ret) {
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IWM_ERR(iwm, "LMAC loading failed\n");
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goto out;
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}
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ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE,
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IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
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if (ret) {
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IWM_ERR(iwm, "Handle INIT_COMPLETE failed for LMAC: %d\n", ret);
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goto out;
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}
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iwm_send_prio_table(iwm);
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iwm_send_calib_results(iwm);
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iwm_send_periodic_calib_cfg(iwm, iwm->conf.periodic_calib_map);
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return 0;
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out:
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iwm_eeprom_exit(iwm);
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return ret;
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}
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