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Currently, we detect whether the SMMU has coherent page table walk capability from the IDR0.CTTW field, and base our cache maintenance decisions on that. In preparation for fixing the bogus DMA API usage, however, we need to ensure that the DMA API agrees about this, which necessitates deferring to the dma-coherent property in the device tree for the final say. As an added bonus, since systems exist where an external CTTW signal has been tied off incorrectly at integration, allowing DT to override it offers a neat workaround for coherency issues with such SMMUs. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
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| .. | ||
| arm,smmu-v3.txt | ||
| arm,smmu.txt | ||
| iommu.txt | ||
| nvidia,tegra20-gart.txt | ||
| nvidia,tegra30-smmu.txt | ||
| renesas,ipmmu-vmsa.txt | ||
| rockchip,iommu.txt | ||
| samsung,sysmmu.txt | ||
| ti,omap-iommu.txt | ||