mirror of
https://github.com/torvalds/linux.git
synced 2024-11-24 21:21:41 +00:00
e7fda6c4c3
Pull timer and time updates from Thomas Gleixner: "A rather large update of timers, timekeeping & co - Core timekeeping code is year-2038 safe now for 32bit machines. Now we just need to fix all in kernel users and the gazillion of user space interfaces which rely on timespec/timeval :) - Better cache layout for the timekeeping internal data structures. - Proper nanosecond based interfaces for in kernel users. - Tree wide cleanup of code which wants nanoseconds but does hoops and loops to convert back and forth from timespecs. Some of it definitely belongs into the ugly code museum. - Consolidation of the timekeeping interface zoo. - A fast NMI safe accessor to clock monotonic for tracing. This is a long standing request to support correlated user/kernel space traces. With proper NTP frequency correction it's also suitable for correlation of traces accross separate machines. - Checkpoint/restart support for timerfd. - A few NOHZ[_FULL] improvements in the [hr]timer code. - Code move from kernel to kernel/time of all time* related code. - New clocksource/event drivers from the ARM universe. I'm really impressed that despite an architected timer in the newer chips SoC manufacturers insist on inventing new and differently broken SoC specific timers. [ Ed. "Impressed"? I don't think that word means what you think it means ] - Another round of code move from arch to drivers. Looks like most of the legacy mess in ARM regarding timers is sorted out except for a few obnoxious strongholds. - The usual updates and fixlets all over the place" * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (114 commits) timekeeping: Fixup typo in update_vsyscall_old definition clocksource: document some basic timekeeping concepts timekeeping: Use cached ntp_tick_length when accumulating error timekeeping: Rework frequency adjustments to work better w/ nohz timekeeping: Minor fixup for timespec64->timespec assignment ftrace: Provide trace clocks monotonic timekeeping: Provide fast and NMI safe access to CLOCK_MONOTONIC seqcount: Add raw_write_seqcount_latch() seqcount: Provide raw_read_seqcount() timekeeping: Use tk_read_base as argument for timekeeping_get_ns() timekeeping: Create struct tk_read_base and use it in struct timekeeper timekeeping: Restructure the timekeeper some more clocksource: Get rid of cycle_last clocksource: Move cycle_last validation to core code clocksource: Make delta calculation a function wireless: ath9k: Get rid of timespec conversions drm: vmwgfx: Use nsec based interfaces drm: i915: Use nsec based interfaces timekeeping: Provide ktime_get_raw() hangcheck-timer: Use ktime_get_ns() ...
408 lines
9.4 KiB
C
408 lines
9.4 KiB
C
#include <linux/err.h>
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#include <linux/pci.h>
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#include <linux/io.h>
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#include <linux/gfp.h>
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#include <linux/export.h>
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void devm_ioremap_release(struct device *dev, void *res)
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{
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iounmap(*(void __iomem **)res);
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}
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static int devm_ioremap_match(struct device *dev, void *res, void *match_data)
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{
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return *(void **)res == match_data;
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}
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/**
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* devm_ioremap - Managed ioremap()
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* @dev: Generic device to remap IO address for
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* @offset: BUS offset to map
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* @size: Size of map
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*
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* Managed ioremap(). Map is automatically unmapped on driver detach.
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*/
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void __iomem *devm_ioremap(struct device *dev, resource_size_t offset,
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unsigned long size)
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{
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void __iomem **ptr, *addr;
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ptr = devres_alloc(devm_ioremap_release, sizeof(*ptr), GFP_KERNEL);
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if (!ptr)
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return NULL;
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addr = ioremap(offset, size);
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if (addr) {
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*ptr = addr;
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devres_add(dev, ptr);
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} else
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devres_free(ptr);
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return addr;
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}
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EXPORT_SYMBOL(devm_ioremap);
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/**
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* devm_ioremap_nocache - Managed ioremap_nocache()
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* @dev: Generic device to remap IO address for
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* @offset: BUS offset to map
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* @size: Size of map
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*
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* Managed ioremap_nocache(). Map is automatically unmapped on driver
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* detach.
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*/
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void __iomem *devm_ioremap_nocache(struct device *dev, resource_size_t offset,
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unsigned long size)
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{
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void __iomem **ptr, *addr;
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ptr = devres_alloc(devm_ioremap_release, sizeof(*ptr), GFP_KERNEL);
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if (!ptr)
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return NULL;
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addr = ioremap_nocache(offset, size);
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if (addr) {
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*ptr = addr;
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devres_add(dev, ptr);
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} else
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devres_free(ptr);
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return addr;
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}
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EXPORT_SYMBOL(devm_ioremap_nocache);
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/**
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* devm_iounmap - Managed iounmap()
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* @dev: Generic device to unmap for
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* @addr: Address to unmap
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*
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* Managed iounmap(). @addr must have been mapped using devm_ioremap*().
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*/
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void devm_iounmap(struct device *dev, void __iomem *addr)
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{
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WARN_ON(devres_destroy(dev, devm_ioremap_release, devm_ioremap_match,
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(__force void *)addr));
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iounmap(addr);
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}
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EXPORT_SYMBOL(devm_iounmap);
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/**
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* devm_ioremap_resource() - check, request region, and ioremap resource
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* @dev: generic device to handle the resource for
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* @res: resource to be handled
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*
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* Checks that a resource is a valid memory region, requests the memory region
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* and ioremaps it either as cacheable or as non-cacheable memory depending on
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* the resource's flags. All operations are managed and will be undone on
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* driver detach.
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*
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* Returns a pointer to the remapped memory or an ERR_PTR() encoded error code
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* on failure. Usage example:
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*
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* res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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* base = devm_ioremap_resource(&pdev->dev, res);
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* if (IS_ERR(base))
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* return PTR_ERR(base);
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*/
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void __iomem *devm_ioremap_resource(struct device *dev, struct resource *res)
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{
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resource_size_t size;
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const char *name;
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void __iomem *dest_ptr;
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BUG_ON(!dev);
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if (!res || resource_type(res) != IORESOURCE_MEM) {
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dev_err(dev, "invalid resource\n");
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return IOMEM_ERR_PTR(-EINVAL);
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}
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size = resource_size(res);
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name = res->name ?: dev_name(dev);
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if (!devm_request_mem_region(dev, res->start, size, name)) {
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dev_err(dev, "can't request region for resource %pR\n", res);
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return IOMEM_ERR_PTR(-EBUSY);
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}
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if (res->flags & IORESOURCE_CACHEABLE)
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dest_ptr = devm_ioremap(dev, res->start, size);
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else
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dest_ptr = devm_ioremap_nocache(dev, res->start, size);
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if (!dest_ptr) {
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dev_err(dev, "ioremap failed for resource %pR\n", res);
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devm_release_mem_region(dev, res->start, size);
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dest_ptr = IOMEM_ERR_PTR(-ENOMEM);
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}
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return dest_ptr;
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}
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EXPORT_SYMBOL(devm_ioremap_resource);
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#ifdef CONFIG_HAS_IOPORT_MAP
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/*
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* Generic iomap devres
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*/
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static void devm_ioport_map_release(struct device *dev, void *res)
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{
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ioport_unmap(*(void __iomem **)res);
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}
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static int devm_ioport_map_match(struct device *dev, void *res,
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void *match_data)
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{
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return *(void **)res == match_data;
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}
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/**
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* devm_ioport_map - Managed ioport_map()
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* @dev: Generic device to map ioport for
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* @port: Port to map
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* @nr: Number of ports to map
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*
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* Managed ioport_map(). Map is automatically unmapped on driver
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* detach.
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*/
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void __iomem *devm_ioport_map(struct device *dev, unsigned long port,
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unsigned int nr)
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{
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void __iomem **ptr, *addr;
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ptr = devres_alloc(devm_ioport_map_release, sizeof(*ptr), GFP_KERNEL);
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if (!ptr)
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return NULL;
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addr = ioport_map(port, nr);
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if (addr) {
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*ptr = addr;
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devres_add(dev, ptr);
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} else
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devres_free(ptr);
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return addr;
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}
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EXPORT_SYMBOL(devm_ioport_map);
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/**
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* devm_ioport_unmap - Managed ioport_unmap()
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* @dev: Generic device to unmap for
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* @addr: Address to unmap
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*
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* Managed ioport_unmap(). @addr must have been mapped using
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* devm_ioport_map().
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*/
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void devm_ioport_unmap(struct device *dev, void __iomem *addr)
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{
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ioport_unmap(addr);
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WARN_ON(devres_destroy(dev, devm_ioport_map_release,
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devm_ioport_map_match, (__force void *)addr));
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}
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EXPORT_SYMBOL(devm_ioport_unmap);
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#endif /* CONFIG_HAS_IOPORT_MAP */
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#ifdef CONFIG_PCI
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/*
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* PCI iomap devres
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*/
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#define PCIM_IOMAP_MAX PCI_ROM_RESOURCE
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struct pcim_iomap_devres {
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void __iomem *table[PCIM_IOMAP_MAX];
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};
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static void pcim_iomap_release(struct device *gendev, void *res)
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{
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struct pci_dev *dev = container_of(gendev, struct pci_dev, dev);
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struct pcim_iomap_devres *this = res;
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int i;
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for (i = 0; i < PCIM_IOMAP_MAX; i++)
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if (this->table[i])
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pci_iounmap(dev, this->table[i]);
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}
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/**
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* pcim_iomap_table - access iomap allocation table
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* @pdev: PCI device to access iomap table for
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*
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* Access iomap allocation table for @dev. If iomap table doesn't
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* exist and @pdev is managed, it will be allocated. All iomaps
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* recorded in the iomap table are automatically unmapped on driver
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* detach.
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*
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* This function might sleep when the table is first allocated but can
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* be safely called without context and guaranteed to succed once
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* allocated.
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*/
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void __iomem * const *pcim_iomap_table(struct pci_dev *pdev)
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{
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struct pcim_iomap_devres *dr, *new_dr;
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dr = devres_find(&pdev->dev, pcim_iomap_release, NULL, NULL);
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if (dr)
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return dr->table;
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new_dr = devres_alloc(pcim_iomap_release, sizeof(*new_dr), GFP_KERNEL);
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if (!new_dr)
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return NULL;
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dr = devres_get(&pdev->dev, new_dr, NULL, NULL);
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return dr->table;
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}
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EXPORT_SYMBOL(pcim_iomap_table);
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/**
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* pcim_iomap - Managed pcim_iomap()
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* @pdev: PCI device to iomap for
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* @bar: BAR to iomap
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* @maxlen: Maximum length of iomap
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*
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* Managed pci_iomap(). Map is automatically unmapped on driver
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* detach.
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*/
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void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen)
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{
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void __iomem **tbl;
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BUG_ON(bar >= PCIM_IOMAP_MAX);
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tbl = (void __iomem **)pcim_iomap_table(pdev);
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if (!tbl || tbl[bar]) /* duplicate mappings not allowed */
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return NULL;
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tbl[bar] = pci_iomap(pdev, bar, maxlen);
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return tbl[bar];
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}
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EXPORT_SYMBOL(pcim_iomap);
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/**
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* pcim_iounmap - Managed pci_iounmap()
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* @pdev: PCI device to iounmap for
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* @addr: Address to unmap
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*
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* Managed pci_iounmap(). @addr must have been mapped using pcim_iomap().
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*/
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void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr)
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{
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void __iomem **tbl;
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int i;
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pci_iounmap(pdev, addr);
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tbl = (void __iomem **)pcim_iomap_table(pdev);
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BUG_ON(!tbl);
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for (i = 0; i < PCIM_IOMAP_MAX; i++)
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if (tbl[i] == addr) {
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tbl[i] = NULL;
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return;
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}
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WARN_ON(1);
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}
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EXPORT_SYMBOL(pcim_iounmap);
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/**
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* pcim_iomap_regions - Request and iomap PCI BARs
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* @pdev: PCI device to map IO resources for
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* @mask: Mask of BARs to request and iomap
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* @name: Name used when requesting regions
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*
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* Request and iomap regions specified by @mask.
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*/
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int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name)
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{
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void __iomem * const *iomap;
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int i, rc;
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iomap = pcim_iomap_table(pdev);
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if (!iomap)
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return -ENOMEM;
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for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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unsigned long len;
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if (!(mask & (1 << i)))
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continue;
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rc = -EINVAL;
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len = pci_resource_len(pdev, i);
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if (!len)
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goto err_inval;
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rc = pci_request_region(pdev, i, name);
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if (rc)
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goto err_inval;
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rc = -ENOMEM;
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if (!pcim_iomap(pdev, i, 0))
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goto err_region;
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}
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return 0;
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err_region:
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pci_release_region(pdev, i);
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err_inval:
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while (--i >= 0) {
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if (!(mask & (1 << i)))
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continue;
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pcim_iounmap(pdev, iomap[i]);
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pci_release_region(pdev, i);
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}
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return rc;
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}
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EXPORT_SYMBOL(pcim_iomap_regions);
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/**
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* pcim_iomap_regions_request_all - Request all BARs and iomap specified ones
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* @pdev: PCI device to map IO resources for
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* @mask: Mask of BARs to iomap
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* @name: Name used when requesting regions
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*
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* Request all PCI BARs and iomap regions specified by @mask.
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*/
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int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask,
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const char *name)
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{
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int request_mask = ((1 << 6) - 1) & ~mask;
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int rc;
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rc = pci_request_selected_regions(pdev, request_mask, name);
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if (rc)
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return rc;
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rc = pcim_iomap_regions(pdev, mask, name);
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if (rc)
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pci_release_selected_regions(pdev, request_mask);
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return rc;
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}
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EXPORT_SYMBOL(pcim_iomap_regions_request_all);
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/**
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* pcim_iounmap_regions - Unmap and release PCI BARs
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* @pdev: PCI device to map IO resources for
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* @mask: Mask of BARs to unmap and release
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*
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* Unmap and release regions specified by @mask.
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*/
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void pcim_iounmap_regions(struct pci_dev *pdev, int mask)
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{
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void __iomem * const *iomap;
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int i;
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iomap = pcim_iomap_table(pdev);
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if (!iomap)
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return;
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for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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if (!(mask & (1 << i)))
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continue;
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pcim_iounmap(pdev, iomap[i]);
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pci_release_region(pdev, i);
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}
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}
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EXPORT_SYMBOL(pcim_iounmap_regions);
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#endif /* CONFIG_PCI */
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