mirror of
https://github.com/torvalds/linux.git
synced 2024-12-29 14:21:47 +00:00
c6778ff813
Device-tree updates for arm64 platforms. Just as with 32-bit, a bunch of smaller
changes, but also some new platforms that are worth mentioning:
* Rockchip RK3399 platforms for Chromebooks, including Samsung Chromebook
Plus (Kevin)
* Orange Pi PC2 (Allwinner H5)
* Freescale LS2088A and LS1088A SoCs
* Expanded support for Nvidia Tegra186 (and Jetson TX2)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZEA5TAAoJEIwa5zzehBx3uPwP/3NBPKvsDQha/x+PPgtSM1cM
pUEF1fxsLftrt+pUeRgMZqGE2xu5vVUKEQsr7KDdWMS9LMs50Pp9dTvfxr7A4Asm
WRRMR7Y3gPbr49uf4+JLLmn0hYXTeaoUftVneBj0qU9Flwe3mQDVULiRjPalWYVB
g0+NwkPE2lrqrudceA2HiVEXqNlVXCIh2mdMaC7Luo0VEsz7nRHT0TOGPaxnXB3M
NoJ56FPHtv3x9+C56B5CLJ/+Ya8SLgfqVwwoK8FgoqDzEF3nbhf/WCUyph+gHdP3
D+jMk7t0tvIW8Ne4TGXenoxBznZxgh5ObpLlKBKPCGJkKxpfuq9koH33MmY/WoUN
7uh3F3HI2sGr7tY/xaN8H7a9A4mHzipj8nqaAsjAJppIpioecGCFVtkY5q0jfxLC
aAc1o4zoimdPs9q9mu/qhgKNxWkoTYnwvtWHuwqEOggvSb1ulS1SPS24VkKrc4LI
XMGbA4mQOuFwZyG4FVfvWzbnhsHzDh4cgHaVGra6z5zoX1MUrvieCWEji+Ul1VWa
lUJ2sTilvSGkwjGcMUSki5p9GcU8dPXwqKiZqDuGx6Ps4aQsw0vz286BnBeVsusG
qLRH4nkqbF9xCEz9h71mcU6WMu17EsG9zMoCg5K4EZ+RIG3cgWq0dMWW1LqtRn7S
2YqayY3+UEyMPN146R1V
=q3Ix
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 64-bit DT updates from Olof Johansson:
"Device-tree updates for arm64 platforms. Just as with 32-bit, a bunch
of smaller changes, but also some new platforms that are worth
mentioning:
- Rockchip RK3399 platforms for Chromebooks, including Samsung
Chromebook Plus (Kevin)
- Orange Pi PC2 (Allwinner H5)
- Freescale LS2088A and LS1088A SoCs
- Expanded support for Nvidia Tegra186 (and Jetson TX2)"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (180 commits)
arm64: dts: Add basic DT to support Spreadtrum's SP9860G
arm64: dts: exynos: Use - instead of @ for DT OPP entries
arm64: dts: exynos: Add support for s6e3hf2 panel device on TM2e board
arm64: dts: juno: add information about L1 and L2 caches
arm64: dts: juno: fix few unit address format warnings
arm64: marvell: dts: enable the crypto engine on the Armada 8040 DB
arm64: marvell: dts: enable the crypto engine on the Armada 7040 DB
arm64: marvell: dts: add crypto engine description for 7k/8k
arm64: dts: marvell: add sdhci support for Armada 7K/8K
arm64: dts: marvell: add eMMC support for Armada 37xx
arm64: dts: hisi: add pinctrl dtsi file for HiKey960 development board
arm64: dts: hisi: add drive strength levels of the pins for Hi3660 SoC
arm64: dts: hisi: enable the NIC and SAS for the hip07-d05 board
arm64: dts: hisi: add SAS nodes for the hip07 SoC
arm64: dts: hisi: add RoCE nodes for the hip07 SoC
arm64: dts: hisi: add network related nodes for the hip07 SoC
arm64: dts: hisi: add mbigen nodes for the hip07 SoC
arm64: dts: rockchip: fix the memory size of PX5 Evaluation board
arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board
dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board
...
45 lines
1.6 KiB
Plaintext
45 lines
1.6 KiB
Plaintext
* Rockchip General Register Files (GRF)
|
|
|
|
The general register file will be used to do static set by software, which
|
|
is composed of many registers for system control.
|
|
|
|
From RK3368 SoCs, the GRF is divided into two sections,
|
|
- GRF, used for general non-secure system,
|
|
- SGRF, used for general secure system,
|
|
- PMUGRF, used for always on system
|
|
|
|
On RK3328 SoCs, the GRF adds a section for USB2PHYGRF,
|
|
|
|
Required Properties:
|
|
|
|
- compatible: GRF should be one of the following:
|
|
- "rockchip,rk3036-grf", "syscon": for rk3036
|
|
- "rockchip,rk3066-grf", "syscon": for rk3066
|
|
- "rockchip,rk3188-grf", "syscon": for rk3188
|
|
- "rockchip,rk3228-grf", "syscon": for rk3228
|
|
- "rockchip,rk3288-grf", "syscon": for rk3288
|
|
- "rockchip,rk3328-grf", "syscon": for rk3328
|
|
- "rockchip,rk3368-grf", "syscon": for rk3368
|
|
- "rockchip,rk3399-grf", "syscon": for rk3399
|
|
- compatible: PMUGRF should be one of the following:
|
|
- "rockchip,rk3368-pmugrf", "syscon": for rk3368
|
|
- "rockchip,rk3399-pmugrf", "syscon": for rk3399
|
|
- compatible: SGRF should be one of the following
|
|
- "rockchip,rk3288-sgrf", "syscon": for rk3288
|
|
- compatible: USB2PHYGRF should be one of the followings
|
|
- "rockchip,rk3328-usb2phy-grf", "syscon": for rk3328
|
|
- reg: physical base address of the controller and length of memory mapped
|
|
region.
|
|
|
|
Example: GRF and PMUGRF of RK3399 SoCs
|
|
|
|
pmugrf: syscon@ff320000 {
|
|
compatible = "rockchip,rk3399-pmugrf", "syscon";
|
|
reg = <0x0 0xff320000 0x0 0x1000>;
|
|
};
|
|
|
|
grf: syscon@ff770000 {
|
|
compatible = "rockchip,rk3399-grf", "syscon";
|
|
reg = <0x0 0xff770000 0x0 0x10000>;
|
|
};
|