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cbb870c822
Use asm offsets to make sure the offset defines to struct _lowcore and its layout don't get out of sync. Also add a BUILD_BUG_ON() which checks that the size of the structure is sane. And while being at it change those sites which use odd casts to access the current lowcore. These should use S390_lowcore instead. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
151 lines
2.9 KiB
ArmAsm
151 lines
2.9 KiB
ArmAsm
/*
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* arch/s390/kernel/base.S
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*
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* Copyright IBM Corp. 2006,2007
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* Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
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* Michael Holzheu <holzheu@de.ibm.com>
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*/
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#include <asm/asm-offsets.h>
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#include <asm/ptrace.h>
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#ifdef CONFIG_64BIT
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.globl s390_base_mcck_handler
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s390_base_mcck_handler:
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basr %r13,0
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0: lg %r15,__LC_PANIC_STACK # load panic stack
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aghi %r15,-STACK_FRAME_OVERHEAD
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larl %r1,s390_base_mcck_handler_fn
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lg %r1,0(%r1)
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ltgr %r1,%r1
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jz 1f
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basr %r14,%r1
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1: la %r1,4095
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lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)
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lpswe __LC_MCK_OLD_PSW
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.section .bss
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.globl s390_base_mcck_handler_fn
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s390_base_mcck_handler_fn:
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.quad 0
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.previous
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.globl s390_base_ext_handler
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s390_base_ext_handler:
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stmg %r0,%r15,__LC_SAVE_AREA
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basr %r13,0
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0: aghi %r15,-STACK_FRAME_OVERHEAD
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larl %r1,s390_base_ext_handler_fn
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lg %r1,0(%r1)
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ltgr %r1,%r1
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jz 1f
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basr %r14,%r1
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1: lmg %r0,%r15,__LC_SAVE_AREA
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ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit
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lpswe __LC_EXT_OLD_PSW
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.section .bss
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.globl s390_base_ext_handler_fn
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s390_base_ext_handler_fn:
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.quad 0
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.previous
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.globl s390_base_pgm_handler
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s390_base_pgm_handler:
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stmg %r0,%r15,__LC_SAVE_AREA
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basr %r13,0
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0: aghi %r15,-STACK_FRAME_OVERHEAD
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larl %r1,s390_base_pgm_handler_fn
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lg %r1,0(%r1)
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ltgr %r1,%r1
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jz 1f
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basr %r14,%r1
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lmg %r0,%r15,__LC_SAVE_AREA
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lpswe __LC_PGM_OLD_PSW
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1: lpswe disabled_wait_psw-0b(%r13)
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.align 8
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disabled_wait_psw:
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.quad 0x0002000180000000,0x0000000000000000 + s390_base_pgm_handler
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.section .bss
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.globl s390_base_pgm_handler_fn
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s390_base_pgm_handler_fn:
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.quad 0
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.previous
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#else /* CONFIG_64BIT */
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.globl s390_base_mcck_handler
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s390_base_mcck_handler:
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basr %r13,0
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0: l %r15,__LC_PANIC_STACK # load panic stack
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ahi %r15,-STACK_FRAME_OVERHEAD
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l %r1,2f-0b(%r13)
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l %r1,0(%r1)
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ltr %r1,%r1
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jz 1f
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basr %r14,%r1
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1: lm %r0,%r15,__LC_GPREGS_SAVE_AREA
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lpsw __LC_MCK_OLD_PSW
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2: .long s390_base_mcck_handler_fn
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.section .bss
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.globl s390_base_mcck_handler_fn
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s390_base_mcck_handler_fn:
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.long 0
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.previous
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.globl s390_base_ext_handler
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s390_base_ext_handler:
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stm %r0,%r15,__LC_SAVE_AREA
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basr %r13,0
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0: ahi %r15,-STACK_FRAME_OVERHEAD
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l %r1,2f-0b(%r13)
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l %r1,0(%r1)
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ltr %r1,%r1
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jz 1f
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basr %r14,%r1
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1: lm %r0,%r15,__LC_SAVE_AREA
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ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit
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lpsw __LC_EXT_OLD_PSW
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2: .long s390_base_ext_handler_fn
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.section .bss
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.globl s390_base_ext_handler_fn
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s390_base_ext_handler_fn:
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.long 0
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.previous
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.globl s390_base_pgm_handler
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s390_base_pgm_handler:
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stm %r0,%r15,__LC_SAVE_AREA
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basr %r13,0
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0: ahi %r15,-STACK_FRAME_OVERHEAD
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l %r1,2f-0b(%r13)
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l %r1,0(%r1)
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ltr %r1,%r1
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jz 1f
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basr %r14,%r1
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lm %r0,%r15,__LC_SAVE_AREA
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lpsw __LC_PGM_OLD_PSW
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1: lpsw disabled_wait_psw-0b(%r13)
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2: .long s390_base_pgm_handler_fn
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disabled_wait_psw:
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.align 8
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.long 0x000a0000,0x00000000 + s390_base_pgm_handler
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.section .bss
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.globl s390_base_pgm_handler_fn
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s390_base_pgm_handler_fn:
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.long 0
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.previous
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#endif /* CONFIG_64BIT */
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