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Most 5XX targets have GPMU (Graphics Power Management Unit) that handles a lot of the heavy lifting for power management including thermal and limits management and dynamic power collapse. While the GPMU itself is optional, it is usually nessesary to hit aggressive power targets. The GPMU firmware needs to be loaded into the GPMU at init time via a shared hardware block of registers. Using the GPU to write the microcode is more efficient than using the CPU so at first load create an indirect buffer that can be executed during subsequent initalization sequences. After loading the GPMU gets initalized through a shared register interface and then we mostly get out of its way and let it do its thing. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
61 lines
1.4 KiB
C
61 lines
1.4 KiB
C
/* Copyright (c) 2016 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __A5XX_GPU_H__
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#define __A5XX_GPU_H__
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#include "adreno_gpu.h"
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/* Bringing over the hack from the previous targets */
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#undef ROP_COPY
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#undef ROP_XOR
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#include "a5xx.xml.h"
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struct a5xx_gpu {
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struct adreno_gpu base;
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struct platform_device *pdev;
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struct drm_gem_object *pm4_bo;
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uint64_t pm4_iova;
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struct drm_gem_object *pfp_bo;
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uint64_t pfp_iova;
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struct drm_gem_object *gpmu_bo;
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uint64_t gpmu_iova;
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uint32_t gpmu_dwords;
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uint32_t lm_leakage;
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};
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#define to_a5xx_gpu(x) container_of(x, struct a5xx_gpu, base)
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int a5xx_power_init(struct msm_gpu *gpu);
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void a5xx_gpmu_ucode_init(struct msm_gpu *gpu);
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static inline int spin_usecs(struct msm_gpu *gpu, uint32_t usecs,
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uint32_t reg, uint32_t mask, uint32_t value)
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{
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while (usecs--) {
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udelay(1);
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if ((gpu_read(gpu, reg) & mask) == value)
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return 0;
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cpu_relax();
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}
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return -ETIMEDOUT;
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}
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#endif /* __A5XX_GPU_H__ */
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