Suravee Suthikulpanit b9f0043e1e iommu/amd: Set translation valid bit only when IO page tables are in use ... On AMD system with SNP enabled, IOMMU hardware checks the host translation valid (TV) and guest translation valid (GV) bits in the device table entry (DTE) before accessing the corresponded page tables. However, current IOMMU driver sets the TV bit for all devices regardless of whether the host page table is in use. This results in ILLEGAL_DEV_TABLE_ENTRY event for devices, which do not the host page table root pointer set up. Thefore, when SNP is enabled, only set TV bit when DMA remapping is not used, which is when domain ID in the AMD IOMMU device table entry (DTE) is zero. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Link: https://lore.kernel.org/r/20220713225651.20758-8-suravee.suthikulpanit@amd.com Signed-off-by: Joerg Roedel <jroedel@suse.de>		2022-07-15 10:41:04 +02:00
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amd_iommu_types.h	iommu/amd: Introduce Support for Extended Feature 2 Register	2022-07-15 10:41:02 +02:00
amd_iommu.h	iommu/amd: Introduce function to check and enable SNP	2022-07-15 10:41:04 +02:00
debugfs.c
init.c	iommu/amd: Set translation valid bit only when IO page tables are in use	2022-07-15 10:41:04 +02:00
io_pgtable.c	iommu/amd: Use try_cmpxchg64 in alloc_pte and free_clear_pte	2022-06-23 09:43:31 +02:00
iommu_v2.c	iommu/amd: Update amd_iommu_fault structure to include PCI seg ID	2022-07-07 09:37:54 +02:00
iommu.c	iommu/amd: Set translation valid bit only when IO page tables are in use	2022-07-15 10:41:04 +02:00
Kconfig	iommu/amd: Prepare for generic IO page table framework	2021-01-28 16:51:17 +01:00
Makefile	iommu/amd: Prepare for generic IO page table framework	2021-01-28 16:51:17 +01:00
quirks.c	iommu/amd: Include PCI segment ID when initialize IOMMU	2022-07-07 09:37:51 +02:00