mirror of
https://github.com/torvalds/linux.git
synced 2024-11-04 11:04:38 +00:00
b9e0d40c0d
Add the driver for the PLL IPs found on Keystone 2 devices. The PLL IP typically has a multiplier, a divider and a post-divider. The PLL IPs like ARMPLL, DDRPLL and PAPLL are controlled by the memory mapped register where as the Main PLL is controlled by a PLL controller and memory map registers. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> |
||
---|---|---|
.. | ||
pll.c |