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b977025153
Setup the USB controller and configure it to operate in host mode. Additionally add the USB phy node for the ZYBO, including reset gpio which is connected to a external MIO pin. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
70 lines
1.3 KiB
Plaintext
70 lines
1.3 KiB
Plaintext
/*
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* Copyright (C) 2011 - 2014 Xilinx
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* Copyright (C) 2012 National Instruments Corp.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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/include/ "zynq-7000.dtsi"
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/ {
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model = "Zynq ZYBO Development Board";
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compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";
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aliases {
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ethernet0 = &gem0;
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serial0 = &uart1;
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x20000000>;
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};
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chosen {
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bootargs = "earlyprintk";
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stdout-path = "serial0:115200n8";
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};
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usb_phy0: phy0 {
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#phy-cells = <0>;
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compatible = "usb-nop-xceiv";
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reset-gpios = <&gpio0 46 1>;
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};
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};
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&clkc {
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ps-clk-frequency = <50000000>;
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};
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&gem0 {
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status = "okay";
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phy-mode = "rgmii-id";
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phy-handle = <ðernet_phy>;
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ethernet_phy: ethernet-phy@0 {
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reg = <0>;
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};
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};
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&sdhci0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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dr_mode = "host";
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usb-phy = <&usb_phy0>;
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};
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