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McBSP's data delay can be configured from 0 to 2 bit clock periods. 0 is used for DSP_B format, 1 for DSP_A format. A data delay of 2 bit clock periods can be used to interface to 'T1 framing' devices where data stream is preceded by a 'framing bit'. This 2 bit clock data delay is not described in the bindings. Add two flags 'ti,T1-framing-[rx/tx]' to enable a data delay of 2 bit clock periods in reception or transmission. Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> Link: https://msgid.link/r/20240402071213.11671-13-bastien.curutchet@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
114 lines
2.4 KiB
YAML
114 lines
2.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/davinci-mcbsp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: McBSP Controller for TI SoCs
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maintainers:
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- Bastien Curutchet <bastien.curutchet@bootlin.com>
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allOf:
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- $ref: dai-common.yaml#
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properties:
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compatible:
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enum:
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- ti,da850-mcbsp
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reg:
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minItems: 1
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items:
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- description: CFG registers
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- description: data registers
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reg-names:
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minItems: 1
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items:
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- const: mpu
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- const: dat
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dmas:
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items:
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- description: transmission DMA channel
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- description: reception DMA channel
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dma-names:
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items:
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- const: tx
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- const: rx
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interrupts:
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items:
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- description: RX interrupt
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- description: TX interrupt
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interrupt-names:
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items:
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- const: rx
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- const: tx
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clocks:
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minItems: 1
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items:
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- description: functional clock
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- description: external input clock for sample rate generator.
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clock-names:
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minItems: 1
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items:
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- const: fck
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- const: clks
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power-domains:
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maxItems: 1
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"#sound-dai-cells":
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const: 0
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ti,T1-framing-tx:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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If the property is present, tx data delay is set to 2 bit clock periods.
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McBSP will insert a blank period (high-impedance period) before the first
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data bit. This can be used to interface to T1-framing devices.
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ti,T1-framing-rx:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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If the property is present, rx data delay is set to 2 bit clock periods.
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McBSP will discard the bit preceding the data stream (called framing bit).
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This can be used to interface to T1-framing devices.
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required:
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- "#sound-dai-cells"
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- compatible
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- reg
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- reg-names
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- dmas
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- dma-names
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- clocks
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unevaluatedProperties: false
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examples:
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- |
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mcbsp0@1d10000 {
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#sound-dai-cells = <0>;
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compatible = "ti,da850-mcbsp";
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pinctrl-names = "default";
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pinctrl-0 = <&mcbsp0_pins>;
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reg = <0x111000 0x1000>,
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<0x311000 0x1000>;
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reg-names = "mpu", "dat";
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interrupts = <97>, <98>;
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interrupt-names = "rx", "tx";
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dmas = <&edma0 3 1>,
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<&edma0 2 1>;
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dma-names = "tx", "rx";
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clocks = <&psc1 14>;
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};
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