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d0653996b7
StarFive JH8100 uses the same OpenCores PWM controller as JH7110. Mark JH8100 as compatible to the OpenCores PWM controller. Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com> Signed-off-by: Ji Sheng Teoh <jisheng.teoh@starfivetech.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
57 lines
1.1 KiB
YAML
57 lines
1.1 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pwm/opencores,pwm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: OpenCores PWM controller
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maintainers:
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- William Qiu <william.qiu@starfivetech.com>
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description:
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The OpenCores PTC ip core contains a PWM controller. When operating in PWM
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mode, the PTC core generates binary signal with user-programmable low and
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high periods. All PTC counters and registers are 32-bit.
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allOf:
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- $ref: pwm.yaml#
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properties:
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compatible:
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items:
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- enum:
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- starfive,jh7100-pwm
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- starfive,jh7110-pwm
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- starfive,jh8100-pwm
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- const: opencores,pwm-v1
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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resets:
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maxItems: 1
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"#pwm-cells":
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const: 3
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required:
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- compatible
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- reg
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- clocks
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additionalProperties: false
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examples:
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- |
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pwm@12490000 {
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compatible = "starfive,jh7110-pwm", "opencores,pwm-v1";
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reg = <0x12490000 0x10000>;
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clocks = <&clkgen 181>;
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resets = <&rstgen 109>;
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#pwm-cells = <3>;
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};
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