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https://github.com/torvalds/linux.git
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b9085bcbf5
Common: Optional support for adding a small amount of polling on each HLT instruction executed in the guest (or equivalent for other architectures). This can improve latency up to 50% on some scenarios (e.g. O_DSYNC writes or TCP_RR netperf tests). This also has to be enabled manually for now, but the plan is to auto-tune this in the future. ARM/ARM64: the highlights are support for GICv3 emulation and dirty page tracking s390: several optimizations and bugfixes. Also a first: a feature exposed by KVM (UUID and long guest name in /proc/sysinfo) before it is available in IBM's hypervisor! :) MIPS: Bugfixes. x86: Support for PML (page modification logging, a new feature in Broadwell Xeons that speeds up dirty page tracking), nested virtualization improvements (nested APICv---a nice optimization), usual round of emulation fixes. There is also a new option to reduce latency of the TSC deadline timer in the guest; this needs to be tuned manually. Some commits are common between this pull and Catalin's; I see you have already included his tree. ARM has other conflicts where functions are added in the same place by 3.19-rc and 3.20 patches. These are not large though, and entirely within KVM. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQEcBAABAgAGBQJU28rkAAoJEL/70l94x66DXqQH/1TDOfJIjW7P2kb0Sw7Fy1wi cEX1KO/VFxAqc8R0E/0Wb55CXyPjQJM6xBXuFr5cUDaIjQ8ULSktL4pEwXyyv/s5 DBDkN65mriry2w5VuEaRLVcuX9Wy+tqLQXWNkEySfyb4uhZChWWHvKEcgw5SqCyg NlpeHurYESIoNyov3jWqvBjr4OmaQENyv7t2c6q5ErIgG02V+iCux5QGbphM2IC9 LFtPKxoqhfeB2xFxTOIt8HJiXrZNwflsTejIlCl/NSEiDVLLxxHCxK2tWK/tUXMn JfLD9ytXBWtNMwInvtFm4fPmDouv2VDyR0xnK2db+/axsJZnbxqjGu1um4Dqbak= =7gdx -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull KVM update from Paolo Bonzini: "Fairly small update, but there are some interesting new features. Common: Optional support for adding a small amount of polling on each HLT instruction executed in the guest (or equivalent for other architectures). This can improve latency up to 50% on some scenarios (e.g. O_DSYNC writes or TCP_RR netperf tests). This also has to be enabled manually for now, but the plan is to auto-tune this in the future. ARM/ARM64: The highlights are support for GICv3 emulation and dirty page tracking s390: Several optimizations and bugfixes. Also a first: a feature exposed by KVM (UUID and long guest name in /proc/sysinfo) before it is available in IBM's hypervisor! :) MIPS: Bugfixes. x86: Support for PML (page modification logging, a new feature in Broadwell Xeons that speeds up dirty page tracking), nested virtualization improvements (nested APICv---a nice optimization), usual round of emulation fixes. There is also a new option to reduce latency of the TSC deadline timer in the guest; this needs to be tuned manually. Some commits are common between this pull and Catalin's; I see you have already included his tree. Powerpc: Nothing yet. The KVM/PPC changes will come in through the PPC maintainers, because I haven't received them yet and I might end up being offline for some part of next week" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (130 commits) KVM: ia64: drop kvm.h from installed user headers KVM: x86: fix build with !CONFIG_SMP KVM: x86: emulate: correct page fault error code for NoWrite instructions KVM: Disable compat ioctl for s390 KVM: s390: add cpu model support KVM: s390: use facilities and cpu_id per KVM KVM: s390/CPACF: Choose crypto control block format s390/kernel: Update /proc/sysinfo file with Extended Name and UUID KVM: s390: reenable LPP facility KVM: s390: floating irqs: fix user triggerable endless loop kvm: add halt_poll_ns module parameter kvm: remove KVM_MMIO_SIZE KVM: MIPS: Don't leak FPU/DSP to guest KVM: MIPS: Disable HTW while in guest KVM: nVMX: Enable nested posted interrupt processing KVM: nVMX: Enable nested virtual interrupt delivery KVM: nVMX: Enable nested apic register virtualization KVM: nVMX: Make nested control MSRs per-cpu KVM: nVMX: Enable nested virtualize x2apic mode KVM: nVMX: Prepare for using hardware MSR bitmap ...
353 lines
8.0 KiB
C
353 lines
8.0 KiB
C
/*
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* SCLP early driver
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*
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* Copyright IBM Corp. 2013
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*/
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#define KMSG_COMPONENT "sclp_early"
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#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
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#include <asm/ctl_reg.h>
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#include <asm/sclp.h>
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#include <asm/ipl.h>
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#include "sclp_sdias.h"
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#include "sclp.h"
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#define SCLP_CMDW_READ_SCP_INFO 0x00020001
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#define SCLP_CMDW_READ_SCP_INFO_FORCED 0x00120001
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struct read_info_sccb {
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struct sccb_header header; /* 0-7 */
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u16 rnmax; /* 8-9 */
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u8 rnsize; /* 10 */
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u8 _pad_11[16 - 11]; /* 11-15 */
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u16 ncpurl; /* 16-17 */
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u16 cpuoff; /* 18-19 */
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u8 _pad_20[24 - 20]; /* 20-23 */
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u8 loadparm[8]; /* 24-31 */
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u8 _pad_32[42 - 32]; /* 32-41 */
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u8 fac42; /* 42 */
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u8 fac43; /* 43 */
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u8 _pad_44[48 - 44]; /* 44-47 */
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u64 facilities; /* 48-55 */
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u8 _pad_56[66 - 56]; /* 56-65 */
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u8 fac66; /* 66 */
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u8 _pad_67[76 - 67]; /* 67-83 */
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u32 ibc; /* 76-79 */
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u8 _pad80[84 - 80]; /* 80-83 */
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u8 fac84; /* 84 */
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u8 fac85; /* 85 */
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u8 _pad_86[91 - 86]; /* 86-90 */
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u8 flags; /* 91 */
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u8 _pad_92[100 - 92]; /* 92-99 */
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u32 rnsize2; /* 100-103 */
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u64 rnmax2; /* 104-111 */
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u8 _pad_112[120 - 112]; /* 112-119 */
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u16 hcpua; /* 120-121 */
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u8 _pad_122[4096 - 122]; /* 122-4095 */
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} __packed __aligned(PAGE_SIZE);
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static char sccb_early[PAGE_SIZE] __aligned(PAGE_SIZE) __initdata;
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static unsigned int sclp_con_has_vt220 __initdata;
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static unsigned int sclp_con_has_linemode __initdata;
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static unsigned long sclp_hsa_size;
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static unsigned int sclp_max_cpu;
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static struct sclp_ipl_info sclp_ipl_info;
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static unsigned char sclp_siif;
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static unsigned char sclp_sigpif;
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static u32 sclp_ibc;
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static unsigned int sclp_mtid;
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static unsigned int sclp_mtid_cp;
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static unsigned int sclp_mtid_max;
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static unsigned int sclp_mtid_prev;
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u64 sclp_facilities;
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u8 sclp_fac84;
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unsigned long long sclp_rzm;
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unsigned long long sclp_rnmax;
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static int __init sclp_cmd_sync_early(sclp_cmdw_t cmd, void *sccb)
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{
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int rc;
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__ctl_set_bit(0, 9);
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rc = sclp_service_call(cmd, sccb);
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if (rc)
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goto out;
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__load_psw_mask(PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_EA |
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PSW_MASK_BA | PSW_MASK_EXT | PSW_MASK_WAIT);
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local_irq_disable();
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out:
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/* Contents of the sccb might have changed. */
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barrier();
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__ctl_clear_bit(0, 9);
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return rc;
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}
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static int __init sclp_read_info_early(struct read_info_sccb *sccb)
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{
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int rc, i;
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sclp_cmdw_t commands[] = {SCLP_CMDW_READ_SCP_INFO_FORCED,
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SCLP_CMDW_READ_SCP_INFO};
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for (i = 0; i < ARRAY_SIZE(commands); i++) {
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do {
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memset(sccb, 0, sizeof(*sccb));
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sccb->header.length = sizeof(*sccb);
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sccb->header.function_code = 0x80;
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sccb->header.control_mask[2] = 0x80;
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rc = sclp_cmd_sync_early(commands[i], sccb);
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} while (rc == -EBUSY);
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if (rc)
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break;
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if (sccb->header.response_code == 0x10)
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return 0;
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if (sccb->header.response_code != 0x1f0)
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break;
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}
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return -EIO;
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}
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static void __init sclp_facilities_detect(struct read_info_sccb *sccb)
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{
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struct sclp_cpu_entry *cpue;
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u16 boot_cpu_address, cpu;
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if (sclp_read_info_early(sccb))
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return;
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sclp_facilities = sccb->facilities;
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sclp_fac84 = sccb->fac84;
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if (sccb->fac85 & 0x02)
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S390_lowcore.machine_flags |= MACHINE_FLAG_ESOP;
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sclp_rnmax = sccb->rnmax ? sccb->rnmax : sccb->rnmax2;
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sclp_rzm = sccb->rnsize ? sccb->rnsize : sccb->rnsize2;
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sclp_rzm <<= 20;
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sclp_ibc = sccb->ibc;
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if (!sccb->hcpua) {
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if (MACHINE_IS_VM)
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sclp_max_cpu = 64;
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else
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sclp_max_cpu = sccb->ncpurl;
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} else {
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sclp_max_cpu = sccb->hcpua + 1;
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}
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boot_cpu_address = stap();
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cpue = (void *)sccb + sccb->cpuoff;
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for (cpu = 0; cpu < sccb->ncpurl; cpue++, cpu++) {
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if (boot_cpu_address != cpue->core_id)
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continue;
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sclp_siif = cpue->siif;
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sclp_sigpif = cpue->sigpif;
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break;
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}
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/* Save IPL information */
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sclp_ipl_info.is_valid = 1;
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if (sccb->flags & 0x2)
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sclp_ipl_info.has_dump = 1;
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memcpy(&sclp_ipl_info.loadparm, &sccb->loadparm, LOADPARM_LEN);
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sclp_mtid = (sccb->fac42 & 0x80) ? (sccb->fac42 & 31) : 0;
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sclp_mtid_cp = (sccb->fac42 & 0x80) ? (sccb->fac43 & 31) : 0;
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sclp_mtid_max = max(sclp_mtid, sclp_mtid_cp);
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sclp_mtid_prev = (sccb->fac42 & 0x80) ? (sccb->fac66 & 31) : 0;
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}
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bool __init sclp_has_linemode(void)
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{
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return !!sclp_con_has_linemode;
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}
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bool __init sclp_has_vt220(void)
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{
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return !!sclp_con_has_vt220;
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}
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unsigned long long sclp_get_rnmax(void)
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{
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return sclp_rnmax;
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}
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unsigned long long sclp_get_rzm(void)
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{
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return sclp_rzm;
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}
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unsigned int sclp_get_max_cpu(void)
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{
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return sclp_max_cpu;
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}
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int sclp_has_siif(void)
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{
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return sclp_siif;
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}
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EXPORT_SYMBOL(sclp_has_siif);
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int sclp_has_sigpif(void)
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{
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return sclp_sigpif;
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}
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EXPORT_SYMBOL(sclp_has_sigpif);
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unsigned int sclp_get_ibc(void)
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{
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return sclp_ibc;
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}
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EXPORT_SYMBOL(sclp_get_ibc);
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unsigned int sclp_get_mtid(u8 cpu_type)
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{
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return cpu_type ? sclp_mtid : sclp_mtid_cp;
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}
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unsigned int sclp_get_mtid_max(void)
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{
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return sclp_mtid_max;
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}
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unsigned int sclp_get_mtid_prev(void)
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{
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return sclp_mtid_prev;
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}
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/*
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* This function will be called after sclp_facilities_detect(), which gets
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* called from early.c code. The sclp_facilities_detect() function retrieves
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* and saves the IPL information.
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*/
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void __init sclp_get_ipl_info(struct sclp_ipl_info *info)
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{
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*info = sclp_ipl_info;
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}
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static int __init sclp_cmd_early(sclp_cmdw_t cmd, void *sccb)
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{
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int rc;
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do {
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rc = sclp_cmd_sync_early(cmd, sccb);
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} while (rc == -EBUSY);
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if (rc)
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return -EIO;
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if (((struct sccb_header *) sccb)->response_code != 0x0020)
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return -EIO;
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return 0;
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}
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static void __init sccb_init_eq_size(struct sdias_sccb *sccb)
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{
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memset(sccb, 0, sizeof(*sccb));
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sccb->hdr.length = sizeof(*sccb);
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sccb->evbuf.hdr.length = sizeof(struct sdias_evbuf);
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sccb->evbuf.hdr.type = EVTYP_SDIAS;
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sccb->evbuf.event_qual = SDIAS_EQ_SIZE;
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sccb->evbuf.data_id = SDIAS_DI_FCP_DUMP;
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sccb->evbuf.event_id = 4712;
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sccb->evbuf.dbs = 1;
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}
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static int __init sclp_set_event_mask(struct init_sccb *sccb,
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unsigned long receive_mask,
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unsigned long send_mask)
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{
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memset(sccb, 0, sizeof(*sccb));
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sccb->header.length = sizeof(*sccb);
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sccb->mask_length = sizeof(sccb_mask_t);
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sccb->receive_mask = receive_mask;
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sccb->send_mask = send_mask;
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return sclp_cmd_early(SCLP_CMDW_WRITE_EVENT_MASK, sccb);
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}
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static long __init sclp_hsa_size_init(struct sdias_sccb *sccb)
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{
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sccb_init_eq_size(sccb);
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if (sclp_cmd_early(SCLP_CMDW_WRITE_EVENT_DATA, sccb))
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return -EIO;
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if (sccb->evbuf.blk_cnt == 0)
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return 0;
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return (sccb->evbuf.blk_cnt - 1) * PAGE_SIZE;
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}
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static long __init sclp_hsa_copy_wait(struct sccb_header *sccb)
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{
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memset(sccb, 0, PAGE_SIZE);
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sccb->length = PAGE_SIZE;
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if (sclp_cmd_early(SCLP_CMDW_READ_EVENT_DATA, sccb))
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return -EIO;
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if (((struct sdias_sccb *) sccb)->evbuf.blk_cnt == 0)
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return 0;
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return (((struct sdias_sccb *) sccb)->evbuf.blk_cnt - 1) * PAGE_SIZE;
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}
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unsigned long sclp_get_hsa_size(void)
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{
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return sclp_hsa_size;
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}
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static void __init sclp_hsa_size_detect(void *sccb)
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{
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long size;
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/* First try synchronous interface (LPAR) */
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if (sclp_set_event_mask(sccb, 0, 0x40000010))
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return;
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size = sclp_hsa_size_init(sccb);
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if (size < 0)
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return;
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if (size != 0)
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goto out;
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/* Then try asynchronous interface (z/VM) */
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if (sclp_set_event_mask(sccb, 0x00000010, 0x40000010))
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return;
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size = sclp_hsa_size_init(sccb);
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if (size < 0)
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return;
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size = sclp_hsa_copy_wait(sccb);
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if (size < 0)
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return;
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out:
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sclp_hsa_size = size;
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}
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static unsigned int __init sclp_con_check_linemode(struct init_sccb *sccb)
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{
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if (!(sccb->sclp_send_mask & EVTYP_OPCMD_MASK))
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return 0;
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if (!(sccb->sclp_receive_mask & (EVTYP_MSG_MASK | EVTYP_PMSGCMD_MASK)))
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return 0;
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return 1;
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}
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static void __init sclp_console_detect(struct init_sccb *sccb)
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{
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if (sccb->header.response_code != 0x20)
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return;
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if (sccb->sclp_send_mask & EVTYP_VT220MSG_MASK)
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sclp_con_has_vt220 = 1;
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if (sclp_con_check_linemode(sccb))
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sclp_con_has_linemode = 1;
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}
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void __init sclp_early_detect(void)
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{
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void *sccb = &sccb_early;
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sclp_facilities_detect(sccb);
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sclp_hsa_size_detect(sccb);
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/* Turn off SCLP event notifications. Also save remote masks in the
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* sccb. These are sufficient to detect sclp console capabilities.
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*/
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sclp_set_event_mask(sccb, 0, 0);
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sclp_console_detect(sccb);
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}
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