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19f7767e29
we received reports of failed allocations in genwqe code: [ 733.550955] genwqe_gzip: page allocation failure: order:1, mode:0x20 [ 733.550964] CPU: 2 PID: 1846 Comm: genwqe_gzip Not tainted 4.3.0-rc3-00042-g3225031 #78 [ 733.550968] 000000002782b830 000000002782b8c0 0000000000000002 0000000000000000 000000002782b960 000000002782b8d8 000000002782b8d8 00000000001134a0 0000000000000000 0000000000892b2a 0000000000871d0a 000000000000000b 000000002782b920 000000002782b8c0 0000000000000000 0000000000000000 0000000000000000 00000000001134a0 000000002782b8c0 000000002782b920 [ 733.551003] Call Trace: [ 733.551013] ([<0000000000113388>] show_trace+0xf8/0x158) [ 733.551018] [<0000000000113452>] show_stack+0x6a/0xe8 [ 733.551024] [<00000000004611d4>] dump_stack+0x7c/0xd8 [ 733.551031] [<000000000024dc22>] warn_alloc_failed+0xda/0x150 [ 733.551036] [<000000000025268e>] __alloc_pages_nodemask+0x94e/0xbc0 [ 733.551041] [<000000000012bcd8>] s390_dma_alloc+0x70/0x1a0 [ 733.551054] [<000003ff804d8e8c>] __genwqe_alloc_consistent+0x84/0xd0 [genwqe_card] [ 733.551063] [<000003ff804d90c2>] genwqe_alloc_sync_sgl+0x13a/0x328 [genwqe_card] [ 733.551066] [<000003ff804d41a0>] do_execute_ddcb+0x1f8/0x388 [genwqe_card] [ 733.551069] [<000003ff804d48c8>] genwqe_ioctl+0x598/0xd50 [genwqe_card] [ 733.551072] [<00000000002cc90c>] do_vfs_ioctl+0x3f4/0x590 [ 733.551074] [<00000000002ccb46>] SyS_ioctl+0x9e/0xb0 [ 733.551078] [<00000000006c8166>] system_call+0xd6/0x258 [ 733.551080] [<000003fffd25819a>] 0x3fffd25819a [ 733.551082] no locks held by genwqe_gzip/1846. This specific allocation and some others in genwqe are unnecessary flagged as atomic. All of genwqe's atomic allocations happen in a context where it's allowed to sleep. Change these to use GFP_KERNEL. Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Acked-by: Frank Haverkamp <haver@linux.vnet.ibm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
1414 lines
34 KiB
C
1414 lines
34 KiB
C
/**
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* IBM Accelerator Family 'GenWQE'
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*
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* (C) Copyright IBM Corp. 2013
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*
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* Author: Frank Haverkamp <haver@linux.vnet.ibm.com>
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* Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
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* Author: Michael Jung <mijung@gmx.net>
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* Author: Michael Ruettger <michael@ibmra.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License (version 2 only)
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* as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/*
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* Character device representation of the GenWQE device. This allows
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* user-space applications to communicate with the card.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/string.h>
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#include <linux/fs.h>
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#include <linux/sched.h>
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#include <linux/wait.h>
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#include <linux/delay.h>
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#include <linux/atomic.h>
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#include "card_base.h"
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#include "card_ddcb.h"
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static int genwqe_open_files(struct genwqe_dev *cd)
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{
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int rc;
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unsigned long flags;
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spin_lock_irqsave(&cd->file_lock, flags);
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rc = list_empty(&cd->file_list);
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spin_unlock_irqrestore(&cd->file_lock, flags);
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return !rc;
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}
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static void genwqe_add_file(struct genwqe_dev *cd, struct genwqe_file *cfile)
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{
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unsigned long flags;
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cfile->owner = current;
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spin_lock_irqsave(&cd->file_lock, flags);
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list_add(&cfile->list, &cd->file_list);
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spin_unlock_irqrestore(&cd->file_lock, flags);
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}
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static int genwqe_del_file(struct genwqe_dev *cd, struct genwqe_file *cfile)
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{
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unsigned long flags;
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spin_lock_irqsave(&cd->file_lock, flags);
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list_del(&cfile->list);
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spin_unlock_irqrestore(&cd->file_lock, flags);
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return 0;
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}
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static void genwqe_add_pin(struct genwqe_file *cfile, struct dma_mapping *m)
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{
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unsigned long flags;
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spin_lock_irqsave(&cfile->pin_lock, flags);
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list_add(&m->pin_list, &cfile->pin_list);
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spin_unlock_irqrestore(&cfile->pin_lock, flags);
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}
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static int genwqe_del_pin(struct genwqe_file *cfile, struct dma_mapping *m)
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{
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unsigned long flags;
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spin_lock_irqsave(&cfile->pin_lock, flags);
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list_del(&m->pin_list);
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spin_unlock_irqrestore(&cfile->pin_lock, flags);
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return 0;
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}
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/**
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* genwqe_search_pin() - Search for the mapping for a userspace address
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* @cfile: Descriptor of opened file
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* @u_addr: User virtual address
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* @size: Size of buffer
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* @dma_addr: DMA address to be updated
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*
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* Return: Pointer to the corresponding mapping NULL if not found
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*/
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static struct dma_mapping *genwqe_search_pin(struct genwqe_file *cfile,
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unsigned long u_addr,
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unsigned int size,
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void **virt_addr)
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{
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unsigned long flags;
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struct dma_mapping *m;
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spin_lock_irqsave(&cfile->pin_lock, flags);
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list_for_each_entry(m, &cfile->pin_list, pin_list) {
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if ((((u64)m->u_vaddr) <= (u_addr)) &&
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(((u64)m->u_vaddr + m->size) >= (u_addr + size))) {
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if (virt_addr)
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*virt_addr = m->k_vaddr +
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(u_addr - (u64)m->u_vaddr);
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spin_unlock_irqrestore(&cfile->pin_lock, flags);
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return m;
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}
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}
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spin_unlock_irqrestore(&cfile->pin_lock, flags);
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return NULL;
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}
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static void __genwqe_add_mapping(struct genwqe_file *cfile,
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struct dma_mapping *dma_map)
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{
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unsigned long flags;
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spin_lock_irqsave(&cfile->map_lock, flags);
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list_add(&dma_map->card_list, &cfile->map_list);
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spin_unlock_irqrestore(&cfile->map_lock, flags);
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}
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static void __genwqe_del_mapping(struct genwqe_file *cfile,
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struct dma_mapping *dma_map)
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{
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unsigned long flags;
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spin_lock_irqsave(&cfile->map_lock, flags);
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list_del(&dma_map->card_list);
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spin_unlock_irqrestore(&cfile->map_lock, flags);
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}
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/**
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* __genwqe_search_mapping() - Search for the mapping for a userspace address
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* @cfile: descriptor of opened file
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* @u_addr: user virtual address
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* @size: size of buffer
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* @dma_addr: DMA address to be updated
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* Return: Pointer to the corresponding mapping NULL if not found
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*/
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static struct dma_mapping *__genwqe_search_mapping(struct genwqe_file *cfile,
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unsigned long u_addr,
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unsigned int size,
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dma_addr_t *dma_addr,
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void **virt_addr)
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{
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unsigned long flags;
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struct dma_mapping *m;
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struct pci_dev *pci_dev = cfile->cd->pci_dev;
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spin_lock_irqsave(&cfile->map_lock, flags);
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list_for_each_entry(m, &cfile->map_list, card_list) {
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if ((((u64)m->u_vaddr) <= (u_addr)) &&
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(((u64)m->u_vaddr + m->size) >= (u_addr + size))) {
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/* match found: current is as expected and
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addr is in range */
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if (dma_addr)
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*dma_addr = m->dma_addr +
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(u_addr - (u64)m->u_vaddr);
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if (virt_addr)
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*virt_addr = m->k_vaddr +
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(u_addr - (u64)m->u_vaddr);
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spin_unlock_irqrestore(&cfile->map_lock, flags);
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return m;
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}
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}
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spin_unlock_irqrestore(&cfile->map_lock, flags);
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dev_err(&pci_dev->dev,
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"[%s] Entry not found: u_addr=%lx, size=%x\n",
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__func__, u_addr, size);
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return NULL;
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}
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static void genwqe_remove_mappings(struct genwqe_file *cfile)
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{
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int i = 0;
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struct list_head *node, *next;
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struct dma_mapping *dma_map;
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struct genwqe_dev *cd = cfile->cd;
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struct pci_dev *pci_dev = cfile->cd->pci_dev;
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list_for_each_safe(node, next, &cfile->map_list) {
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dma_map = list_entry(node, struct dma_mapping, card_list);
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list_del_init(&dma_map->card_list);
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/*
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* This is really a bug, because those things should
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* have been already tidied up.
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*
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* GENWQE_MAPPING_RAW should have been removed via mmunmap().
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* GENWQE_MAPPING_SGL_TEMP should be removed by tidy up code.
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*/
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dev_err(&pci_dev->dev,
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"[%s] %d. cleanup mapping: u_vaddr=%p u_kaddr=%016lx dma_addr=%lx\n",
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__func__, i++, dma_map->u_vaddr,
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(unsigned long)dma_map->k_vaddr,
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(unsigned long)dma_map->dma_addr);
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if (dma_map->type == GENWQE_MAPPING_RAW) {
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/* we allocated this dynamically */
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__genwqe_free_consistent(cd, dma_map->size,
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dma_map->k_vaddr,
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dma_map->dma_addr);
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kfree(dma_map);
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} else if (dma_map->type == GENWQE_MAPPING_SGL_TEMP) {
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/* we use dma_map statically from the request */
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genwqe_user_vunmap(cd, dma_map, NULL);
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}
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}
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}
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static void genwqe_remove_pinnings(struct genwqe_file *cfile)
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{
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struct list_head *node, *next;
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struct dma_mapping *dma_map;
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struct genwqe_dev *cd = cfile->cd;
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list_for_each_safe(node, next, &cfile->pin_list) {
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dma_map = list_entry(node, struct dma_mapping, pin_list);
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/*
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* This is not a bug, because a killed processed might
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* not call the unpin ioctl, which is supposed to free
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* the resources.
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*
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* Pinnings are dymically allocated and need to be
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* deleted.
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*/
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list_del_init(&dma_map->pin_list);
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genwqe_user_vunmap(cd, dma_map, NULL);
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kfree(dma_map);
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}
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}
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/**
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* genwqe_kill_fasync() - Send signal to all processes with open GenWQE files
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*
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* E.g. genwqe_send_signal(cd, SIGIO);
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*/
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static int genwqe_kill_fasync(struct genwqe_dev *cd, int sig)
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{
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unsigned int files = 0;
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unsigned long flags;
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struct genwqe_file *cfile;
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spin_lock_irqsave(&cd->file_lock, flags);
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list_for_each_entry(cfile, &cd->file_list, list) {
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if (cfile->async_queue)
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kill_fasync(&cfile->async_queue, sig, POLL_HUP);
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files++;
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}
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spin_unlock_irqrestore(&cd->file_lock, flags);
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return files;
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}
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static int genwqe_force_sig(struct genwqe_dev *cd, int sig)
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{
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unsigned int files = 0;
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unsigned long flags;
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struct genwqe_file *cfile;
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spin_lock_irqsave(&cd->file_lock, flags);
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list_for_each_entry(cfile, &cd->file_list, list) {
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force_sig(sig, cfile->owner);
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files++;
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}
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spin_unlock_irqrestore(&cd->file_lock, flags);
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return files;
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}
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/**
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* genwqe_open() - file open
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* @inode: file system information
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* @filp: file handle
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*
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* This function is executed whenever an application calls
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* open("/dev/genwqe",..).
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*
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* Return: 0 if successful or <0 if errors
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*/
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static int genwqe_open(struct inode *inode, struct file *filp)
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{
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struct genwqe_dev *cd;
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struct genwqe_file *cfile;
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struct pci_dev *pci_dev;
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cfile = kzalloc(sizeof(*cfile), GFP_KERNEL);
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if (cfile == NULL)
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return -ENOMEM;
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cd = container_of(inode->i_cdev, struct genwqe_dev, cdev_genwqe);
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pci_dev = cd->pci_dev;
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cfile->cd = cd;
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cfile->filp = filp;
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cfile->client = NULL;
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spin_lock_init(&cfile->map_lock); /* list of raw memory allocations */
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INIT_LIST_HEAD(&cfile->map_list);
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spin_lock_init(&cfile->pin_lock); /* list of user pinned memory */
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INIT_LIST_HEAD(&cfile->pin_list);
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filp->private_data = cfile;
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genwqe_add_file(cd, cfile);
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return 0;
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}
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/**
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* genwqe_fasync() - Setup process to receive SIGIO.
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* @fd: file descriptor
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* @filp: file handle
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* @mode: file mode
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*
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* Sending a signal is working as following:
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*
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* if (cdev->async_queue)
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* kill_fasync(&cdev->async_queue, SIGIO, POLL_IN);
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*
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* Some devices also implement asynchronous notification to indicate
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* when the device can be written; in this case, of course,
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* kill_fasync must be called with a mode of POLL_OUT.
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*/
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static int genwqe_fasync(int fd, struct file *filp, int mode)
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{
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struct genwqe_file *cdev = (struct genwqe_file *)filp->private_data;
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return fasync_helper(fd, filp, mode, &cdev->async_queue);
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}
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/**
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* genwqe_release() - file close
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* @inode: file system information
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* @filp: file handle
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*
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* This function is executed whenever an application calls 'close(fd_genwqe)'
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*
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* Return: always 0
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*/
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static int genwqe_release(struct inode *inode, struct file *filp)
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{
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struct genwqe_file *cfile = (struct genwqe_file *)filp->private_data;
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struct genwqe_dev *cd = cfile->cd;
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/* there must be no entries in these lists! */
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genwqe_remove_mappings(cfile);
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genwqe_remove_pinnings(cfile);
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/* remove this filp from the asynchronously notified filp's */
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genwqe_fasync(-1, filp, 0);
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/*
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* For this to work we must not release cd when this cfile is
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* not yet released, otherwise the list entry is invalid,
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* because the list itself gets reinstantiated!
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*/
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genwqe_del_file(cd, cfile);
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kfree(cfile);
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return 0;
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}
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static void genwqe_vma_open(struct vm_area_struct *vma)
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{
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/* nothing ... */
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}
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/**
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* genwqe_vma_close() - Called each time when vma is unmapped
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*
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* Free memory which got allocated by GenWQE mmap().
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*/
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static void genwqe_vma_close(struct vm_area_struct *vma)
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{
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unsigned long vsize = vma->vm_end - vma->vm_start;
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struct inode *inode = file_inode(vma->vm_file);
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struct dma_mapping *dma_map;
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struct genwqe_dev *cd = container_of(inode->i_cdev, struct genwqe_dev,
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cdev_genwqe);
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struct pci_dev *pci_dev = cd->pci_dev;
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dma_addr_t d_addr = 0;
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struct genwqe_file *cfile = vma->vm_private_data;
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dma_map = __genwqe_search_mapping(cfile, vma->vm_start, vsize,
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&d_addr, NULL);
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if (dma_map == NULL) {
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dev_err(&pci_dev->dev,
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" [%s] err: mapping not found: v=%lx, p=%lx s=%lx\n",
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__func__, vma->vm_start, vma->vm_pgoff << PAGE_SHIFT,
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vsize);
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return;
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}
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__genwqe_del_mapping(cfile, dma_map);
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__genwqe_free_consistent(cd, dma_map->size, dma_map->k_vaddr,
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dma_map->dma_addr);
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kfree(dma_map);
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}
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static const struct vm_operations_struct genwqe_vma_ops = {
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.open = genwqe_vma_open,
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.close = genwqe_vma_close,
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};
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/**
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* genwqe_mmap() - Provide contignous buffers to userspace
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*
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* We use mmap() to allocate contignous buffers used for DMA
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* transfers. After the buffer is allocated we remap it to user-space
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* and remember a reference to our dma_mapping data structure, where
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* we store the associated DMA address and allocated size.
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*
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* When we receive a DDCB execution request with the ATS bits set to
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* plain buffer, we lookup our dma_mapping list to find the
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* corresponding DMA address for the associated user-space address.
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*/
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static int genwqe_mmap(struct file *filp, struct vm_area_struct *vma)
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{
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int rc;
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unsigned long pfn, vsize = vma->vm_end - vma->vm_start;
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struct genwqe_file *cfile = (struct genwqe_file *)filp->private_data;
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struct genwqe_dev *cd = cfile->cd;
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|
struct dma_mapping *dma_map;
|
|
|
|
if (vsize == 0)
|
|
return -EINVAL;
|
|
|
|
if (get_order(vsize) > MAX_ORDER)
|
|
return -ENOMEM;
|
|
|
|
dma_map = kzalloc(sizeof(struct dma_mapping), GFP_KERNEL);
|
|
if (dma_map == NULL)
|
|
return -ENOMEM;
|
|
|
|
genwqe_mapping_init(dma_map, GENWQE_MAPPING_RAW);
|
|
dma_map->u_vaddr = (void *)vma->vm_start;
|
|
dma_map->size = vsize;
|
|
dma_map->nr_pages = DIV_ROUND_UP(vsize, PAGE_SIZE);
|
|
dma_map->k_vaddr = __genwqe_alloc_consistent(cd, vsize,
|
|
&dma_map->dma_addr);
|
|
if (dma_map->k_vaddr == NULL) {
|
|
rc = -ENOMEM;
|
|
goto free_dma_map;
|
|
}
|
|
|
|
if (capable(CAP_SYS_ADMIN) && (vsize > sizeof(dma_addr_t)))
|
|
*(dma_addr_t *)dma_map->k_vaddr = dma_map->dma_addr;
|
|
|
|
pfn = virt_to_phys(dma_map->k_vaddr) >> PAGE_SHIFT;
|
|
rc = remap_pfn_range(vma,
|
|
vma->vm_start,
|
|
pfn,
|
|
vsize,
|
|
vma->vm_page_prot);
|
|
if (rc != 0) {
|
|
rc = -EFAULT;
|
|
goto free_dma_mem;
|
|
}
|
|
|
|
vma->vm_private_data = cfile;
|
|
vma->vm_ops = &genwqe_vma_ops;
|
|
__genwqe_add_mapping(cfile, dma_map);
|
|
|
|
return 0;
|
|
|
|
free_dma_mem:
|
|
__genwqe_free_consistent(cd, dma_map->size,
|
|
dma_map->k_vaddr,
|
|
dma_map->dma_addr);
|
|
free_dma_map:
|
|
kfree(dma_map);
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* do_flash_update() - Excute flash update (write image or CVPD)
|
|
* @cd: genwqe device
|
|
* @load: details about image load
|
|
*
|
|
* Return: 0 if successful
|
|
*/
|
|
|
|
#define FLASH_BLOCK 0x40000 /* we use 256k blocks */
|
|
|
|
static int do_flash_update(struct genwqe_file *cfile,
|
|
struct genwqe_bitstream *load)
|
|
{
|
|
int rc = 0;
|
|
int blocks_to_flash;
|
|
dma_addr_t dma_addr;
|
|
u64 flash = 0;
|
|
size_t tocopy = 0;
|
|
u8 __user *buf;
|
|
u8 *xbuf;
|
|
u32 crc;
|
|
u8 cmdopts;
|
|
struct genwqe_dev *cd = cfile->cd;
|
|
struct file *filp = cfile->filp;
|
|
struct pci_dev *pci_dev = cd->pci_dev;
|
|
|
|
if ((load->size & 0x3) != 0)
|
|
return -EINVAL;
|
|
|
|
if (((unsigned long)(load->data_addr) & ~PAGE_MASK) != 0)
|
|
return -EINVAL;
|
|
|
|
/* FIXME Bits have changed for new service layer! */
|
|
switch ((char)load->partition) {
|
|
case '0':
|
|
cmdopts = 0x14;
|
|
break; /* download/erase_first/part_0 */
|
|
case '1':
|
|
cmdopts = 0x1C;
|
|
break; /* download/erase_first/part_1 */
|
|
case 'v':
|
|
cmdopts = 0x0C;
|
|
break; /* download/erase_first/vpd */
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
buf = (u8 __user *)load->data_addr;
|
|
xbuf = __genwqe_alloc_consistent(cd, FLASH_BLOCK, &dma_addr);
|
|
if (xbuf == NULL)
|
|
return -ENOMEM;
|
|
|
|
blocks_to_flash = load->size / FLASH_BLOCK;
|
|
while (load->size) {
|
|
struct genwqe_ddcb_cmd *req;
|
|
|
|
/*
|
|
* We must be 4 byte aligned. Buffer must be 0 appened
|
|
* to have defined values when calculating CRC.
|
|
*/
|
|
tocopy = min_t(size_t, load->size, FLASH_BLOCK);
|
|
|
|
rc = copy_from_user(xbuf, buf, tocopy);
|
|
if (rc) {
|
|
rc = -EFAULT;
|
|
goto free_buffer;
|
|
}
|
|
crc = genwqe_crc32(xbuf, tocopy, 0xffffffff);
|
|
|
|
dev_dbg(&pci_dev->dev,
|
|
"[%s] DMA: %lx CRC: %08x SZ: %ld %d\n",
|
|
__func__, (unsigned long)dma_addr, crc, tocopy,
|
|
blocks_to_flash);
|
|
|
|
/* prepare DDCB for SLU process */
|
|
req = ddcb_requ_alloc();
|
|
if (req == NULL) {
|
|
rc = -ENOMEM;
|
|
goto free_buffer;
|
|
}
|
|
|
|
req->cmd = SLCMD_MOVE_FLASH;
|
|
req->cmdopts = cmdopts;
|
|
|
|
/* prepare invariant values */
|
|
if (genwqe_get_slu_id(cd) <= 0x2) {
|
|
*(__be64 *)&req->__asiv[0] = cpu_to_be64(dma_addr);
|
|
*(__be64 *)&req->__asiv[8] = cpu_to_be64(tocopy);
|
|
*(__be64 *)&req->__asiv[16] = cpu_to_be64(flash);
|
|
*(__be32 *)&req->__asiv[24] = cpu_to_be32(0);
|
|
req->__asiv[24] = load->uid;
|
|
*(__be32 *)&req->__asiv[28] = cpu_to_be32(crc);
|
|
|
|
/* for simulation only */
|
|
*(__be64 *)&req->__asiv[88] = cpu_to_be64(load->slu_id);
|
|
*(__be64 *)&req->__asiv[96] = cpu_to_be64(load->app_id);
|
|
req->asiv_length = 32; /* bytes included in crc calc */
|
|
} else { /* setup DDCB for ATS architecture */
|
|
*(__be64 *)&req->asiv[0] = cpu_to_be64(dma_addr);
|
|
*(__be32 *)&req->asiv[8] = cpu_to_be32(tocopy);
|
|
*(__be32 *)&req->asiv[12] = cpu_to_be32(0); /* resvd */
|
|
*(__be64 *)&req->asiv[16] = cpu_to_be64(flash);
|
|
*(__be32 *)&req->asiv[24] = cpu_to_be32(load->uid<<24);
|
|
*(__be32 *)&req->asiv[28] = cpu_to_be32(crc);
|
|
|
|
/* for simulation only */
|
|
*(__be64 *)&req->asiv[80] = cpu_to_be64(load->slu_id);
|
|
*(__be64 *)&req->asiv[88] = cpu_to_be64(load->app_id);
|
|
|
|
/* Rd only */
|
|
req->ats = 0x4ULL << 44;
|
|
req->asiv_length = 40; /* bytes included in crc calc */
|
|
}
|
|
req->asv_length = 8;
|
|
|
|
/* For Genwqe5 we get back the calculated CRC */
|
|
*(u64 *)&req->asv[0] = 0ULL; /* 0x80 */
|
|
|
|
rc = __genwqe_execute_raw_ddcb(cd, req, filp->f_flags);
|
|
|
|
load->retc = req->retc;
|
|
load->attn = req->attn;
|
|
load->progress = req->progress;
|
|
|
|
if (rc < 0) {
|
|
ddcb_requ_free(req);
|
|
goto free_buffer;
|
|
}
|
|
|
|
if (req->retc != DDCB_RETC_COMPLETE) {
|
|
rc = -EIO;
|
|
ddcb_requ_free(req);
|
|
goto free_buffer;
|
|
}
|
|
|
|
load->size -= tocopy;
|
|
flash += tocopy;
|
|
buf += tocopy;
|
|
blocks_to_flash--;
|
|
ddcb_requ_free(req);
|
|
}
|
|
|
|
free_buffer:
|
|
__genwqe_free_consistent(cd, FLASH_BLOCK, xbuf, dma_addr);
|
|
return rc;
|
|
}
|
|
|
|
static int do_flash_read(struct genwqe_file *cfile,
|
|
struct genwqe_bitstream *load)
|
|
{
|
|
int rc, blocks_to_flash;
|
|
dma_addr_t dma_addr;
|
|
u64 flash = 0;
|
|
size_t tocopy = 0;
|
|
u8 __user *buf;
|
|
u8 *xbuf;
|
|
u8 cmdopts;
|
|
struct genwqe_dev *cd = cfile->cd;
|
|
struct file *filp = cfile->filp;
|
|
struct pci_dev *pci_dev = cd->pci_dev;
|
|
struct genwqe_ddcb_cmd *cmd;
|
|
|
|
if ((load->size & 0x3) != 0)
|
|
return -EINVAL;
|
|
|
|
if (((unsigned long)(load->data_addr) & ~PAGE_MASK) != 0)
|
|
return -EINVAL;
|
|
|
|
/* FIXME Bits have changed for new service layer! */
|
|
switch ((char)load->partition) {
|
|
case '0':
|
|
cmdopts = 0x12;
|
|
break; /* upload/part_0 */
|
|
case '1':
|
|
cmdopts = 0x1A;
|
|
break; /* upload/part_1 */
|
|
case 'v':
|
|
cmdopts = 0x0A;
|
|
break; /* upload/vpd */
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
buf = (u8 __user *)load->data_addr;
|
|
xbuf = __genwqe_alloc_consistent(cd, FLASH_BLOCK, &dma_addr);
|
|
if (xbuf == NULL)
|
|
return -ENOMEM;
|
|
|
|
blocks_to_flash = load->size / FLASH_BLOCK;
|
|
while (load->size) {
|
|
/*
|
|
* We must be 4 byte aligned. Buffer must be 0 appened
|
|
* to have defined values when calculating CRC.
|
|
*/
|
|
tocopy = min_t(size_t, load->size, FLASH_BLOCK);
|
|
|
|
dev_dbg(&pci_dev->dev,
|
|
"[%s] DMA: %lx SZ: %ld %d\n",
|
|
__func__, (unsigned long)dma_addr, tocopy,
|
|
blocks_to_flash);
|
|
|
|
/* prepare DDCB for SLU process */
|
|
cmd = ddcb_requ_alloc();
|
|
if (cmd == NULL) {
|
|
rc = -ENOMEM;
|
|
goto free_buffer;
|
|
}
|
|
cmd->cmd = SLCMD_MOVE_FLASH;
|
|
cmd->cmdopts = cmdopts;
|
|
|
|
/* prepare invariant values */
|
|
if (genwqe_get_slu_id(cd) <= 0x2) {
|
|
*(__be64 *)&cmd->__asiv[0] = cpu_to_be64(dma_addr);
|
|
*(__be64 *)&cmd->__asiv[8] = cpu_to_be64(tocopy);
|
|
*(__be64 *)&cmd->__asiv[16] = cpu_to_be64(flash);
|
|
*(__be32 *)&cmd->__asiv[24] = cpu_to_be32(0);
|
|
cmd->__asiv[24] = load->uid;
|
|
*(__be32 *)&cmd->__asiv[28] = cpu_to_be32(0) /* CRC */;
|
|
cmd->asiv_length = 32; /* bytes included in crc calc */
|
|
} else { /* setup DDCB for ATS architecture */
|
|
*(__be64 *)&cmd->asiv[0] = cpu_to_be64(dma_addr);
|
|
*(__be32 *)&cmd->asiv[8] = cpu_to_be32(tocopy);
|
|
*(__be32 *)&cmd->asiv[12] = cpu_to_be32(0); /* resvd */
|
|
*(__be64 *)&cmd->asiv[16] = cpu_to_be64(flash);
|
|
*(__be32 *)&cmd->asiv[24] = cpu_to_be32(load->uid<<24);
|
|
*(__be32 *)&cmd->asiv[28] = cpu_to_be32(0); /* CRC */
|
|
|
|
/* rd/wr */
|
|
cmd->ats = 0x5ULL << 44;
|
|
cmd->asiv_length = 40; /* bytes included in crc calc */
|
|
}
|
|
cmd->asv_length = 8;
|
|
|
|
/* we only get back the calculated CRC */
|
|
*(u64 *)&cmd->asv[0] = 0ULL; /* 0x80 */
|
|
|
|
rc = __genwqe_execute_raw_ddcb(cd, cmd, filp->f_flags);
|
|
|
|
load->retc = cmd->retc;
|
|
load->attn = cmd->attn;
|
|
load->progress = cmd->progress;
|
|
|
|
if ((rc < 0) && (rc != -EBADMSG)) {
|
|
ddcb_requ_free(cmd);
|
|
goto free_buffer;
|
|
}
|
|
|
|
rc = copy_to_user(buf, xbuf, tocopy);
|
|
if (rc) {
|
|
rc = -EFAULT;
|
|
ddcb_requ_free(cmd);
|
|
goto free_buffer;
|
|
}
|
|
|
|
/* We know that we can get retc 0x104 with CRC err */
|
|
if (((cmd->retc == DDCB_RETC_FAULT) &&
|
|
(cmd->attn != 0x02)) || /* Normally ignore CRC error */
|
|
((cmd->retc == DDCB_RETC_COMPLETE) &&
|
|
(cmd->attn != 0x00))) { /* Everything was fine */
|
|
rc = -EIO;
|
|
ddcb_requ_free(cmd);
|
|
goto free_buffer;
|
|
}
|
|
|
|
load->size -= tocopy;
|
|
flash += tocopy;
|
|
buf += tocopy;
|
|
blocks_to_flash--;
|
|
ddcb_requ_free(cmd);
|
|
}
|
|
rc = 0;
|
|
|
|
free_buffer:
|
|
__genwqe_free_consistent(cd, FLASH_BLOCK, xbuf, dma_addr);
|
|
return rc;
|
|
}
|
|
|
|
static int genwqe_pin_mem(struct genwqe_file *cfile, struct genwqe_mem *m)
|
|
{
|
|
int rc;
|
|
struct genwqe_dev *cd = cfile->cd;
|
|
struct pci_dev *pci_dev = cfile->cd->pci_dev;
|
|
struct dma_mapping *dma_map;
|
|
unsigned long map_addr;
|
|
unsigned long map_size;
|
|
|
|
if ((m->addr == 0x0) || (m->size == 0))
|
|
return -EINVAL;
|
|
|
|
map_addr = (m->addr & PAGE_MASK);
|
|
map_size = round_up(m->size + (m->addr & ~PAGE_MASK), PAGE_SIZE);
|
|
|
|
dma_map = kzalloc(sizeof(struct dma_mapping), GFP_KERNEL);
|
|
if (dma_map == NULL)
|
|
return -ENOMEM;
|
|
|
|
genwqe_mapping_init(dma_map, GENWQE_MAPPING_SGL_PINNED);
|
|
rc = genwqe_user_vmap(cd, dma_map, (void *)map_addr, map_size, NULL);
|
|
if (rc != 0) {
|
|
dev_err(&pci_dev->dev,
|
|
"[%s] genwqe_user_vmap rc=%d\n", __func__, rc);
|
|
kfree(dma_map);
|
|
return rc;
|
|
}
|
|
|
|
genwqe_add_pin(cfile, dma_map);
|
|
return 0;
|
|
}
|
|
|
|
static int genwqe_unpin_mem(struct genwqe_file *cfile, struct genwqe_mem *m)
|
|
{
|
|
struct genwqe_dev *cd = cfile->cd;
|
|
struct dma_mapping *dma_map;
|
|
unsigned long map_addr;
|
|
unsigned long map_size;
|
|
|
|
if (m->addr == 0x0)
|
|
return -EINVAL;
|
|
|
|
map_addr = (m->addr & PAGE_MASK);
|
|
map_size = round_up(m->size + (m->addr & ~PAGE_MASK), PAGE_SIZE);
|
|
|
|
dma_map = genwqe_search_pin(cfile, map_addr, map_size, NULL);
|
|
if (dma_map == NULL)
|
|
return -ENOENT;
|
|
|
|
genwqe_del_pin(cfile, dma_map);
|
|
genwqe_user_vunmap(cd, dma_map, NULL);
|
|
kfree(dma_map);
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* ddcb_cmd_cleanup() - Remove dynamically created fixup entries
|
|
*
|
|
* Only if there are any. Pinnings are not removed.
|
|
*/
|
|
static int ddcb_cmd_cleanup(struct genwqe_file *cfile, struct ddcb_requ *req)
|
|
{
|
|
unsigned int i;
|
|
struct dma_mapping *dma_map;
|
|
struct genwqe_dev *cd = cfile->cd;
|
|
|
|
for (i = 0; i < DDCB_FIXUPS; i++) {
|
|
dma_map = &req->dma_mappings[i];
|
|
|
|
if (dma_mapping_used(dma_map)) {
|
|
__genwqe_del_mapping(cfile, dma_map);
|
|
genwqe_user_vunmap(cd, dma_map, req);
|
|
}
|
|
if (req->sgls[i].sgl != NULL)
|
|
genwqe_free_sync_sgl(cd, &req->sgls[i]);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* ddcb_cmd_fixups() - Establish DMA fixups/sglists for user memory references
|
|
*
|
|
* Before the DDCB gets executed we need to handle the fixups. We
|
|
* replace the user-space addresses with DMA addresses or do
|
|
* additional setup work e.g. generating a scatter-gather list which
|
|
* is used to describe the memory referred to in the fixup.
|
|
*/
|
|
static int ddcb_cmd_fixups(struct genwqe_file *cfile, struct ddcb_requ *req)
|
|
{
|
|
int rc;
|
|
unsigned int asiv_offs, i;
|
|
struct genwqe_dev *cd = cfile->cd;
|
|
struct genwqe_ddcb_cmd *cmd = &req->cmd;
|
|
struct dma_mapping *m;
|
|
const char *type = "UNKNOWN";
|
|
|
|
for (i = 0, asiv_offs = 0x00; asiv_offs <= 0x58;
|
|
i++, asiv_offs += 0x08) {
|
|
|
|
u64 u_addr;
|
|
dma_addr_t d_addr;
|
|
u32 u_size = 0;
|
|
u64 ats_flags;
|
|
|
|
ats_flags = ATS_GET_FLAGS(cmd->ats, asiv_offs);
|
|
|
|
switch (ats_flags) {
|
|
|
|
case ATS_TYPE_DATA:
|
|
break; /* nothing to do here */
|
|
|
|
case ATS_TYPE_FLAT_RDWR:
|
|
case ATS_TYPE_FLAT_RD: {
|
|
u_addr = be64_to_cpu(*((__be64 *)&cmd->
|
|
asiv[asiv_offs]));
|
|
u_size = be32_to_cpu(*((__be32 *)&cmd->
|
|
asiv[asiv_offs + 0x08]));
|
|
|
|
/*
|
|
* No data available. Ignore u_addr in this
|
|
* case and set addr to 0. Hardware must not
|
|
* fetch the buffer.
|
|
*/
|
|
if (u_size == 0x0) {
|
|
*((__be64 *)&cmd->asiv[asiv_offs]) =
|
|
cpu_to_be64(0x0);
|
|
break;
|
|
}
|
|
|
|
m = __genwqe_search_mapping(cfile, u_addr, u_size,
|
|
&d_addr, NULL);
|
|
if (m == NULL) {
|
|
rc = -EFAULT;
|
|
goto err_out;
|
|
}
|
|
|
|
*((__be64 *)&cmd->asiv[asiv_offs]) =
|
|
cpu_to_be64(d_addr);
|
|
break;
|
|
}
|
|
|
|
case ATS_TYPE_SGL_RDWR:
|
|
case ATS_TYPE_SGL_RD: {
|
|
int page_offs;
|
|
|
|
u_addr = be64_to_cpu(*((__be64 *)
|
|
&cmd->asiv[asiv_offs]));
|
|
u_size = be32_to_cpu(*((__be32 *)
|
|
&cmd->asiv[asiv_offs + 0x08]));
|
|
|
|
/*
|
|
* No data available. Ignore u_addr in this
|
|
* case and set addr to 0. Hardware must not
|
|
* fetch the empty sgl.
|
|
*/
|
|
if (u_size == 0x0) {
|
|
*((__be64 *)&cmd->asiv[asiv_offs]) =
|
|
cpu_to_be64(0x0);
|
|
break;
|
|
}
|
|
|
|
m = genwqe_search_pin(cfile, u_addr, u_size, NULL);
|
|
if (m != NULL) {
|
|
type = "PINNING";
|
|
page_offs = (u_addr -
|
|
(u64)m->u_vaddr)/PAGE_SIZE;
|
|
} else {
|
|
type = "MAPPING";
|
|
m = &req->dma_mappings[i];
|
|
|
|
genwqe_mapping_init(m,
|
|
GENWQE_MAPPING_SGL_TEMP);
|
|
rc = genwqe_user_vmap(cd, m, (void *)u_addr,
|
|
u_size, req);
|
|
if (rc != 0)
|
|
goto err_out;
|
|
|
|
__genwqe_add_mapping(cfile, m);
|
|
page_offs = 0;
|
|
}
|
|
|
|
/* create genwqe style scatter gather list */
|
|
rc = genwqe_alloc_sync_sgl(cd, &req->sgls[i],
|
|
(void __user *)u_addr,
|
|
u_size);
|
|
if (rc != 0)
|
|
goto err_out;
|
|
|
|
genwqe_setup_sgl(cd, &req->sgls[i],
|
|
&m->dma_list[page_offs]);
|
|
|
|
*((__be64 *)&cmd->asiv[asiv_offs]) =
|
|
cpu_to_be64(req->sgls[i].sgl_dma_addr);
|
|
|
|
break;
|
|
}
|
|
default:
|
|
rc = -EINVAL;
|
|
goto err_out;
|
|
}
|
|
}
|
|
return 0;
|
|
|
|
err_out:
|
|
ddcb_cmd_cleanup(cfile, req);
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* genwqe_execute_ddcb() - Execute DDCB using userspace address fixups
|
|
*
|
|
* The code will build up the translation tables or lookup the
|
|
* contignous memory allocation table to find the right translations
|
|
* and DMA addresses.
|
|
*/
|
|
static int genwqe_execute_ddcb(struct genwqe_file *cfile,
|
|
struct genwqe_ddcb_cmd *cmd)
|
|
{
|
|
int rc;
|
|
struct genwqe_dev *cd = cfile->cd;
|
|
struct file *filp = cfile->filp;
|
|
struct ddcb_requ *req = container_of(cmd, struct ddcb_requ, cmd);
|
|
|
|
rc = ddcb_cmd_fixups(cfile, req);
|
|
if (rc != 0)
|
|
return rc;
|
|
|
|
rc = __genwqe_execute_raw_ddcb(cd, cmd, filp->f_flags);
|
|
ddcb_cmd_cleanup(cfile, req);
|
|
return rc;
|
|
}
|
|
|
|
static int do_execute_ddcb(struct genwqe_file *cfile,
|
|
unsigned long arg, int raw)
|
|
{
|
|
int rc;
|
|
struct genwqe_ddcb_cmd *cmd;
|
|
struct ddcb_requ *req;
|
|
struct genwqe_dev *cd = cfile->cd;
|
|
struct file *filp = cfile->filp;
|
|
|
|
cmd = ddcb_requ_alloc();
|
|
if (cmd == NULL)
|
|
return -ENOMEM;
|
|
|
|
req = container_of(cmd, struct ddcb_requ, cmd);
|
|
|
|
if (copy_from_user(cmd, (void __user *)arg, sizeof(*cmd))) {
|
|
ddcb_requ_free(cmd);
|
|
return -EFAULT;
|
|
}
|
|
|
|
if (!raw)
|
|
rc = genwqe_execute_ddcb(cfile, cmd);
|
|
else
|
|
rc = __genwqe_execute_raw_ddcb(cd, cmd, filp->f_flags);
|
|
|
|
/* Copy back only the modifed fields. Do not copy ASIV
|
|
back since the copy got modified by the driver. */
|
|
if (copy_to_user((void __user *)arg, cmd,
|
|
sizeof(*cmd) - DDCB_ASIV_LENGTH)) {
|
|
ddcb_requ_free(cmd);
|
|
return -EFAULT;
|
|
}
|
|
|
|
ddcb_requ_free(cmd);
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* genwqe_ioctl() - IO control
|
|
* @filp: file handle
|
|
* @cmd: command identifier (passed from user)
|
|
* @arg: argument (passed from user)
|
|
*
|
|
* Return: 0 success
|
|
*/
|
|
static long genwqe_ioctl(struct file *filp, unsigned int cmd,
|
|
unsigned long arg)
|
|
{
|
|
int rc = 0;
|
|
struct genwqe_file *cfile = (struct genwqe_file *)filp->private_data;
|
|
struct genwqe_dev *cd = cfile->cd;
|
|
struct pci_dev *pci_dev = cd->pci_dev;
|
|
struct genwqe_reg_io __user *io;
|
|
u64 val;
|
|
u32 reg_offs;
|
|
|
|
/* Return -EIO if card hit EEH */
|
|
if (pci_channel_offline(pci_dev))
|
|
return -EIO;
|
|
|
|
if (_IOC_TYPE(cmd) != GENWQE_IOC_CODE)
|
|
return -EINVAL;
|
|
|
|
switch (cmd) {
|
|
|
|
case GENWQE_GET_CARD_STATE:
|
|
put_user(cd->card_state, (enum genwqe_card_state __user *)arg);
|
|
return 0;
|
|
|
|
/* Register access */
|
|
case GENWQE_READ_REG64: {
|
|
io = (struct genwqe_reg_io __user *)arg;
|
|
|
|
if (get_user(reg_offs, &io->num))
|
|
return -EFAULT;
|
|
|
|
if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7))
|
|
return -EINVAL;
|
|
|
|
val = __genwqe_readq(cd, reg_offs);
|
|
put_user(val, &io->val64);
|
|
return 0;
|
|
}
|
|
|
|
case GENWQE_WRITE_REG64: {
|
|
io = (struct genwqe_reg_io __user *)arg;
|
|
|
|
if (!capable(CAP_SYS_ADMIN))
|
|
return -EPERM;
|
|
|
|
if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
|
|
return -EPERM;
|
|
|
|
if (get_user(reg_offs, &io->num))
|
|
return -EFAULT;
|
|
|
|
if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7))
|
|
return -EINVAL;
|
|
|
|
if (get_user(val, &io->val64))
|
|
return -EFAULT;
|
|
|
|
__genwqe_writeq(cd, reg_offs, val);
|
|
return 0;
|
|
}
|
|
|
|
case GENWQE_READ_REG32: {
|
|
io = (struct genwqe_reg_io __user *)arg;
|
|
|
|
if (get_user(reg_offs, &io->num))
|
|
return -EFAULT;
|
|
|
|
if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x3))
|
|
return -EINVAL;
|
|
|
|
val = __genwqe_readl(cd, reg_offs);
|
|
put_user(val, &io->val64);
|
|
return 0;
|
|
}
|
|
|
|
case GENWQE_WRITE_REG32: {
|
|
io = (struct genwqe_reg_io __user *)arg;
|
|
|
|
if (!capable(CAP_SYS_ADMIN))
|
|
return -EPERM;
|
|
|
|
if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
|
|
return -EPERM;
|
|
|
|
if (get_user(reg_offs, &io->num))
|
|
return -EFAULT;
|
|
|
|
if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x3))
|
|
return -EINVAL;
|
|
|
|
if (get_user(val, &io->val64))
|
|
return -EFAULT;
|
|
|
|
__genwqe_writel(cd, reg_offs, val);
|
|
return 0;
|
|
}
|
|
|
|
/* Flash update/reading */
|
|
case GENWQE_SLU_UPDATE: {
|
|
struct genwqe_bitstream load;
|
|
|
|
if (!genwqe_is_privileged(cd))
|
|
return -EPERM;
|
|
|
|
if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
|
|
return -EPERM;
|
|
|
|
if (copy_from_user(&load, (void __user *)arg,
|
|
sizeof(load)))
|
|
return -EFAULT;
|
|
|
|
rc = do_flash_update(cfile, &load);
|
|
|
|
if (copy_to_user((void __user *)arg, &load, sizeof(load)))
|
|
return -EFAULT;
|
|
|
|
return rc;
|
|
}
|
|
|
|
case GENWQE_SLU_READ: {
|
|
struct genwqe_bitstream load;
|
|
|
|
if (!genwqe_is_privileged(cd))
|
|
return -EPERM;
|
|
|
|
if (genwqe_flash_readback_fails(cd))
|
|
return -ENOSPC; /* known to fail for old versions */
|
|
|
|
if (copy_from_user(&load, (void __user *)arg, sizeof(load)))
|
|
return -EFAULT;
|
|
|
|
rc = do_flash_read(cfile, &load);
|
|
|
|
if (copy_to_user((void __user *)arg, &load, sizeof(load)))
|
|
return -EFAULT;
|
|
|
|
return rc;
|
|
}
|
|
|
|
/* memory pinning and unpinning */
|
|
case GENWQE_PIN_MEM: {
|
|
struct genwqe_mem m;
|
|
|
|
if (copy_from_user(&m, (void __user *)arg, sizeof(m)))
|
|
return -EFAULT;
|
|
|
|
return genwqe_pin_mem(cfile, &m);
|
|
}
|
|
|
|
case GENWQE_UNPIN_MEM: {
|
|
struct genwqe_mem m;
|
|
|
|
if (copy_from_user(&m, (void __user *)arg, sizeof(m)))
|
|
return -EFAULT;
|
|
|
|
return genwqe_unpin_mem(cfile, &m);
|
|
}
|
|
|
|
/* launch an DDCB and wait for completion */
|
|
case GENWQE_EXECUTE_DDCB:
|
|
return do_execute_ddcb(cfile, arg, 0);
|
|
|
|
case GENWQE_EXECUTE_RAW_DDCB: {
|
|
|
|
if (!capable(CAP_SYS_ADMIN))
|
|
return -EPERM;
|
|
|
|
return do_execute_ddcb(cfile, arg, 1);
|
|
}
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
return rc;
|
|
}
|
|
|
|
#if defined(CONFIG_COMPAT)
|
|
/**
|
|
* genwqe_compat_ioctl() - Compatibility ioctl
|
|
*
|
|
* Called whenever a 32-bit process running under a 64-bit kernel
|
|
* performs an ioctl on /dev/genwqe<n>_card.
|
|
*
|
|
* @filp: file pointer.
|
|
* @cmd: command.
|
|
* @arg: user argument.
|
|
* Return: zero on success or negative number on failure.
|
|
*/
|
|
static long genwqe_compat_ioctl(struct file *filp, unsigned int cmd,
|
|
unsigned long arg)
|
|
{
|
|
return genwqe_ioctl(filp, cmd, arg);
|
|
}
|
|
#endif /* defined(CONFIG_COMPAT) */
|
|
|
|
static const struct file_operations genwqe_fops = {
|
|
.owner = THIS_MODULE,
|
|
.open = genwqe_open,
|
|
.fasync = genwqe_fasync,
|
|
.mmap = genwqe_mmap,
|
|
.unlocked_ioctl = genwqe_ioctl,
|
|
#if defined(CONFIG_COMPAT)
|
|
.compat_ioctl = genwqe_compat_ioctl,
|
|
#endif
|
|
.release = genwqe_release,
|
|
};
|
|
|
|
static int genwqe_device_initialized(struct genwqe_dev *cd)
|
|
{
|
|
return cd->dev != NULL;
|
|
}
|
|
|
|
/**
|
|
* genwqe_device_create() - Create and configure genwqe char device
|
|
* @cd: genwqe device descriptor
|
|
*
|
|
* This function must be called before we create any more genwqe
|
|
* character devices, because it is allocating the major and minor
|
|
* number which are supposed to be used by the client drivers.
|
|
*/
|
|
int genwqe_device_create(struct genwqe_dev *cd)
|
|
{
|
|
int rc;
|
|
struct pci_dev *pci_dev = cd->pci_dev;
|
|
|
|
/*
|
|
* Here starts the individual setup per client. It must
|
|
* initialize its own cdev data structure with its own fops.
|
|
* The appropriate devnum needs to be created. The ranges must
|
|
* not overlap.
|
|
*/
|
|
rc = alloc_chrdev_region(&cd->devnum_genwqe, 0,
|
|
GENWQE_MAX_MINOR, GENWQE_DEVNAME);
|
|
if (rc < 0) {
|
|
dev_err(&pci_dev->dev, "err: alloc_chrdev_region failed\n");
|
|
goto err_dev;
|
|
}
|
|
|
|
cdev_init(&cd->cdev_genwqe, &genwqe_fops);
|
|
cd->cdev_genwqe.owner = THIS_MODULE;
|
|
|
|
rc = cdev_add(&cd->cdev_genwqe, cd->devnum_genwqe, 1);
|
|
if (rc < 0) {
|
|
dev_err(&pci_dev->dev, "err: cdev_add failed\n");
|
|
goto err_add;
|
|
}
|
|
|
|
/*
|
|
* Finally the device in /dev/... must be created. The rule is
|
|
* to use card%d_clientname for each created device.
|
|
*/
|
|
cd->dev = device_create_with_groups(cd->class_genwqe,
|
|
&cd->pci_dev->dev,
|
|
cd->devnum_genwqe, cd,
|
|
genwqe_attribute_groups,
|
|
GENWQE_DEVNAME "%u_card",
|
|
cd->card_idx);
|
|
if (IS_ERR(cd->dev)) {
|
|
rc = PTR_ERR(cd->dev);
|
|
goto err_cdev;
|
|
}
|
|
|
|
rc = genwqe_init_debugfs(cd);
|
|
if (rc != 0)
|
|
goto err_debugfs;
|
|
|
|
return 0;
|
|
|
|
err_debugfs:
|
|
device_destroy(cd->class_genwqe, cd->devnum_genwqe);
|
|
err_cdev:
|
|
cdev_del(&cd->cdev_genwqe);
|
|
err_add:
|
|
unregister_chrdev_region(cd->devnum_genwqe, GENWQE_MAX_MINOR);
|
|
err_dev:
|
|
cd->dev = NULL;
|
|
return rc;
|
|
}
|
|
|
|
static int genwqe_inform_and_stop_processes(struct genwqe_dev *cd)
|
|
{
|
|
int rc;
|
|
unsigned int i;
|
|
struct pci_dev *pci_dev = cd->pci_dev;
|
|
|
|
if (!genwqe_open_files(cd))
|
|
return 0;
|
|
|
|
dev_warn(&pci_dev->dev, "[%s] send SIGIO and wait ...\n", __func__);
|
|
|
|
rc = genwqe_kill_fasync(cd, SIGIO);
|
|
if (rc > 0) {
|
|
/* give kill_timeout seconds to close file descriptors ... */
|
|
for (i = 0; (i < genwqe_kill_timeout) &&
|
|
genwqe_open_files(cd); i++) {
|
|
dev_info(&pci_dev->dev, " %d sec ...", i);
|
|
|
|
cond_resched();
|
|
msleep(1000);
|
|
}
|
|
|
|
/* if no open files we can safely continue, else ... */
|
|
if (!genwqe_open_files(cd))
|
|
return 0;
|
|
|
|
dev_warn(&pci_dev->dev,
|
|
"[%s] send SIGKILL and wait ...\n", __func__);
|
|
|
|
rc = genwqe_force_sig(cd, SIGKILL); /* force terminate */
|
|
if (rc) {
|
|
/* Give kill_timout more seconds to end processes */
|
|
for (i = 0; (i < genwqe_kill_timeout) &&
|
|
genwqe_open_files(cd); i++) {
|
|
dev_warn(&pci_dev->dev, " %d sec ...", i);
|
|
|
|
cond_resched();
|
|
msleep(1000);
|
|
}
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* genwqe_device_remove() - Remove genwqe's char device
|
|
*
|
|
* This function must be called after the client devices are removed
|
|
* because it will free the major/minor number range for the genwqe
|
|
* drivers.
|
|
*
|
|
* This function must be robust enough to be called twice.
|
|
*/
|
|
int genwqe_device_remove(struct genwqe_dev *cd)
|
|
{
|
|
int rc;
|
|
struct pci_dev *pci_dev = cd->pci_dev;
|
|
|
|
if (!genwqe_device_initialized(cd))
|
|
return 1;
|
|
|
|
genwqe_inform_and_stop_processes(cd);
|
|
|
|
/*
|
|
* We currently do wait until all filedescriptors are
|
|
* closed. This leads to a problem when we abort the
|
|
* application which will decrease this reference from
|
|
* 1/unused to 0/illegal and not from 2/used 1/empty.
|
|
*/
|
|
rc = atomic_read(&cd->cdev_genwqe.kobj.kref.refcount);
|
|
if (rc != 1) {
|
|
dev_err(&pci_dev->dev,
|
|
"[%s] err: cdev_genwqe...refcount=%d\n", __func__, rc);
|
|
panic("Fatal err: cannot free resources with pending references!");
|
|
}
|
|
|
|
genqwe_exit_debugfs(cd);
|
|
device_destroy(cd->class_genwqe, cd->devnum_genwqe);
|
|
cdev_del(&cd->cdev_genwqe);
|
|
unregister_chrdev_region(cd->devnum_genwqe, GENWQE_MAX_MINOR);
|
|
cd->dev = NULL;
|
|
|
|
return 0;
|
|
}
|