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7797ff4248
The QorIQ Layerscape SoC has several thermal sensors but the current driver only supports one. Massage the code to be sensor oriented and allow the support for multiple sensors. Signed-off-by: Yuantian Tang <andy.tang@nxp.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
306 lines
7.3 KiB
C
306 lines
7.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright 2016 Freescale Semiconductor, Inc.
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/thermal.h>
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#include "thermal_core.h"
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#define SITES_MAX 16
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/*
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* QorIQ TMU Registers
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*/
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struct qoriq_tmu_site_regs {
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u32 tritsr; /* Immediate Temperature Site Register */
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u32 tratsr; /* Average Temperature Site Register */
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u8 res0[0x8];
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};
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struct qoriq_tmu_regs {
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u32 tmr; /* Mode Register */
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#define TMR_DISABLE 0x0
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#define TMR_ME 0x80000000
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#define TMR_ALPF 0x0c000000
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u32 tsr; /* Status Register */
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u32 tmtmir; /* Temperature measurement interval Register */
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#define TMTMIR_DEFAULT 0x0000000f
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u8 res0[0x14];
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u32 tier; /* Interrupt Enable Register */
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#define TIER_DISABLE 0x0
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u32 tidr; /* Interrupt Detect Register */
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u32 tiscr; /* Interrupt Site Capture Register */
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u32 ticscr; /* Interrupt Critical Site Capture Register */
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u8 res1[0x10];
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u32 tmhtcrh; /* High Temperature Capture Register */
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u32 tmhtcrl; /* Low Temperature Capture Register */
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u8 res2[0x8];
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u32 tmhtitr; /* High Temperature Immediate Threshold */
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u32 tmhtatr; /* High Temperature Average Threshold */
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u32 tmhtactr; /* High Temperature Average Crit Threshold */
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u8 res3[0x24];
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u32 ttcfgr; /* Temperature Configuration Register */
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u32 tscfgr; /* Sensor Configuration Register */
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u8 res4[0x78];
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struct qoriq_tmu_site_regs site[SITES_MAX];
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u8 res5[0x9f8];
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u32 ipbrr0; /* IP Block Revision Register 0 */
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u32 ipbrr1; /* IP Block Revision Register 1 */
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u8 res6[0x310];
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u32 ttr0cr; /* Temperature Range 0 Control Register */
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u32 ttr1cr; /* Temperature Range 1 Control Register */
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u32 ttr2cr; /* Temperature Range 2 Control Register */
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u32 ttr3cr; /* Temperature Range 3 Control Register */
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};
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struct qoriq_tmu_data;
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/*
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* Thermal zone data
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*/
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struct qoriq_sensor {
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struct thermal_zone_device *tzd;
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struct qoriq_tmu_data *qdata;
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int id;
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};
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struct qoriq_tmu_data {
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struct qoriq_tmu_regs __iomem *regs;
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bool little_endian;
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struct qoriq_sensor *sensor[SITES_MAX];
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};
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static void tmu_write(struct qoriq_tmu_data *p, u32 val, void __iomem *addr)
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{
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if (p->little_endian)
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iowrite32(val, addr);
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else
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iowrite32be(val, addr);
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}
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static u32 tmu_read(struct qoriq_tmu_data *p, void __iomem *addr)
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{
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if (p->little_endian)
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return ioread32(addr);
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else
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return ioread32be(addr);
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}
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static int tmu_get_temp(void *p, int *temp)
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{
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struct qoriq_sensor *qsensor = p;
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struct qoriq_tmu_data *qdata = qsensor->qdata;
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u32 val;
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val = tmu_read(qdata, &qdata->regs->site[qsensor->id].tritsr);
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*temp = (val & 0xff) * 1000;
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return 0;
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}
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static const struct thermal_zone_of_device_ops tmu_tz_ops = {
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.get_temp = tmu_get_temp,
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};
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static int qoriq_tmu_register_tmu_zone(struct platform_device *pdev)
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{
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struct qoriq_tmu_data *qdata = platform_get_drvdata(pdev);
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int id, sites = 0;
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for (id = 0; id < SITES_MAX; id++) {
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qdata->sensor[id] = devm_kzalloc(&pdev->dev,
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sizeof(struct qoriq_sensor), GFP_KERNEL);
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if (!qdata->sensor[id])
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return -ENOMEM;
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qdata->sensor[id]->id = id;
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qdata->sensor[id]->qdata = qdata;
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qdata->sensor[id]->tzd = devm_thermal_zone_of_sensor_register(
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&pdev->dev, id, qdata->sensor[id], &tmu_tz_ops);
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if (IS_ERR(qdata->sensor[id]->tzd)) {
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if (PTR_ERR(qdata->sensor[id]->tzd) == -ENODEV)
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continue;
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else
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return PTR_ERR(qdata->sensor[id]->tzd);
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}
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sites |= 0x1 << (15 - id);
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}
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/* Enable monitoring */
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if (sites != 0)
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tmu_write(qdata, sites | TMR_ME | TMR_ALPF, &qdata->regs->tmr);
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return 0;
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}
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static int qoriq_tmu_calibration(struct platform_device *pdev)
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{
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int i, val, len;
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u32 range[4];
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const u32 *calibration;
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struct device_node *np = pdev->dev.of_node;
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struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
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if (of_property_read_u32_array(np, "fsl,tmu-range", range, 4)) {
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dev_err(&pdev->dev, "missing calibration range.\n");
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return -ENODEV;
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}
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/* Init temperature range registers */
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tmu_write(data, range[0], &data->regs->ttr0cr);
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tmu_write(data, range[1], &data->regs->ttr1cr);
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tmu_write(data, range[2], &data->regs->ttr2cr);
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tmu_write(data, range[3], &data->regs->ttr3cr);
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calibration = of_get_property(np, "fsl,tmu-calibration", &len);
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if (calibration == NULL || len % 8) {
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dev_err(&pdev->dev, "invalid calibration data.\n");
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return -ENODEV;
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}
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for (i = 0; i < len; i += 8, calibration += 2) {
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val = of_read_number(calibration, 1);
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tmu_write(data, val, &data->regs->ttcfgr);
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val = of_read_number(calibration + 1, 1);
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tmu_write(data, val, &data->regs->tscfgr);
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}
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return 0;
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}
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static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
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{
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/* Disable interrupt, using polling instead */
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tmu_write(data, TIER_DISABLE, &data->regs->tier);
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/* Set update_interval */
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tmu_write(data, TMTMIR_DEFAULT, &data->regs->tmtmir);
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/* Disable monitoring */
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tmu_write(data, TMR_DISABLE, &data->regs->tmr);
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}
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static int qoriq_tmu_probe(struct platform_device *pdev)
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{
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int ret;
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struct qoriq_tmu_data *data;
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struct device_node *np = pdev->dev.of_node;
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if (!np) {
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dev_err(&pdev->dev, "Device OF-Node is NULL");
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return -ENODEV;
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}
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data = devm_kzalloc(&pdev->dev, sizeof(struct qoriq_tmu_data),
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GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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platform_set_drvdata(pdev, data);
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data->little_endian = of_property_read_bool(np, "little-endian");
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data->regs = of_iomap(np, 0);
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if (!data->regs) {
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dev_err(&pdev->dev, "Failed to get memory region\n");
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ret = -ENODEV;
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goto err_iomap;
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}
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qoriq_tmu_init_device(data); /* TMU initialization */
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ret = qoriq_tmu_calibration(pdev); /* TMU calibration */
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if (ret < 0)
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goto err_tmu;
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ret = qoriq_tmu_register_tmu_zone(pdev);
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if (ret < 0) {
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dev_err(&pdev->dev, "Failed to register sensors\n");
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ret = -ENODEV;
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goto err_iomap;
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}
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return 0;
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err_tmu:
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iounmap(data->regs);
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err_iomap:
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platform_set_drvdata(pdev, NULL);
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return ret;
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}
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static int qoriq_tmu_remove(struct platform_device *pdev)
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{
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struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
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/* Disable monitoring */
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tmu_write(data, TMR_DISABLE, &data->regs->tmr);
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iounmap(data->regs);
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platform_set_drvdata(pdev, NULL);
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int qoriq_tmu_suspend(struct device *dev)
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{
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u32 tmr;
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struct qoriq_tmu_data *data = dev_get_drvdata(dev);
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/* Disable monitoring */
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tmr = tmu_read(data, &data->regs->tmr);
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tmr &= ~TMR_ME;
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tmu_write(data, tmr, &data->regs->tmr);
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return 0;
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}
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static int qoriq_tmu_resume(struct device *dev)
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{
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u32 tmr;
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struct qoriq_tmu_data *data = dev_get_drvdata(dev);
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/* Enable monitoring */
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tmr = tmu_read(data, &data->regs->tmr);
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tmr |= TMR_ME;
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tmu_write(data, tmr, &data->regs->tmr);
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return 0;
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}
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#endif
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static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
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qoriq_tmu_suspend, qoriq_tmu_resume);
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static const struct of_device_id qoriq_tmu_match[] = {
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{ .compatible = "fsl,qoriq-tmu", },
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{ .compatible = "fsl,imx8mq-tmu", },
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{},
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};
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MODULE_DEVICE_TABLE(of, qoriq_tmu_match);
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static struct platform_driver qoriq_tmu = {
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.driver = {
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.name = "qoriq_thermal",
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.pm = &qoriq_tmu_pm_ops,
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.of_match_table = qoriq_tmu_match,
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},
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.probe = qoriq_tmu_probe,
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.remove = qoriq_tmu_remove,
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};
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module_platform_driver(qoriq_tmu);
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MODULE_AUTHOR("Jia Hongtao <hongtao.jia@nxp.com>");
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MODULE_DESCRIPTION("QorIQ Thermal Monitoring Unit driver");
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MODULE_LICENSE("GPL v2");
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