linux/drivers/misc/cxl
Vaibhav Jain b6c84ba22f cxl: Disable prefault_mode in Radix mode
Currently we see a kernel-oops reported on Power-9 while attaching a
context to an AFU, with radix-mode and sysfs attr 'prefault_mode' set
to anything other than 'none'. The backtrace of the oops is of this
form:

  Unable to handle kernel paging request for data at address 0x00000080
  Faulting instruction address: 0xc00800000bcf3b20
  cpu 0x1: Vector: 300 (Data Access) at [c00000037f003800]
      pc: c00800000bcf3b20: cxl_load_segment+0x178/0x290 [cxl]
      lr: c00800000bcf39f0: cxl_load_segment+0x48/0x290 [cxl]
      sp: c00000037f003a80
     msr: 9000000000009033
     dar: 80
   dsisr: 40000000
    current = 0xc00000037f280000
    paca    = 0xc0000003ffffe600   softe: 3        irq_happened: 0x01
      pid   = 3529, comm = afp_no_int
  <snip>
  cxl_prefault+0xfc/0x248 [cxl]
  process_element_entry_psl9+0xd8/0x1a0 [cxl]
  cxl_attach_dedicated_process_psl9+0x44/0x130 [cxl]
  native_attach_process+0xc0/0x130 [cxl]
  afu_ioctl+0x3f4/0x5e0 [cxl]
  do_vfs_ioctl+0xdc/0x890
  ksys_ioctl+0x68/0xf0
  sys_ioctl+0x40/0xa0
  system_call+0x58/0x6c

The issue is caused as on Power-8 the AFU attr 'prefault_mode' was
used to improve initial storage fault performance by prefaulting
process segments. However on Power-9 with radix mode we don't have
Storage-Segments that we can prefault. Also prefaulting process Pages
will be too costly and fine-grained.

Hence, since the prefaulting mechanism doesn't makes sense of
radix-mode, this patch updates prefault_mode_store() to not allow any
other value apart from CXL_PREFAULT_NONE when radix mode is enabled.

Fixes: f24be42aab ("cxl: Add psl9 specific code")
Cc: stable@vger.kernel.org # v4.12+
Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com>
Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-06-02 01:48:05 +10:00
..
api.c the rest of drivers/*: annotate ->poll() instances 2017-11-28 11:06:58 -05:00
base.c cxl: Add support for interrupts on the Mellanox CX4 2016-07-14 20:27:08 +10:00
context.c cxl: Add support for ASB_Notify on POWER9 2018-01-19 23:19:37 +11:00
cxl.h cxl: read PHB indications from the device tree 2018-03-13 15:50:30 +11:00
cxllib.c cxl: Fix possible deadlock when processing page faults from cxllib 2018-04-04 22:09:33 +10:00
debugfs.c cxl: Rework the implementation of cxl_stop_trace_psl9() 2017-11-06 16:48:17 +11:00
fault.c cxl: Add support for POWER9 DD2 2017-10-06 20:52:43 +11:00
file.c vfs: do bulk POLL* -> EPOLL* replacement 2018-02-11 14:34:03 -08:00
flash.c License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
guest.c cxl: Add psl9 specific code 2017-04-13 23:34:31 +10:00
hcalls.c cxl: Remove unused values in bare-metal environment. 2017-04-13 23:34:28 +10:00
hcalls.h cxl: Add guest-specific code 2016-03-09 23:36:52 +11:00
irq.c cxl: Add psl9 specific code 2017-04-13 23:34:31 +10:00
Kconfig cxl: Export library to support IBM XSL 2017-07-03 23:07:03 +10:00
main.c cxl: Fixes for Coherent Accelerator Interface Architecture 2.0 2017-06-23 16:26:23 +10:00
Makefile License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
native.c cxl: Check if PSL data-cache is available before issue flush request 2018-03-13 15:50:26 +11:00
of.c cxl: replace loop with for_each_child_of_node(), remove unneeded of_node_put() 2016-10-04 16:19:23 +11:00
pci.c cxl: Fix timebase synchronization status on P9 2018-03-14 20:01:18 +11:00
phb.c cxl: Fix error handling in _cxl_pci_associate_default_context() 2016-11-18 22:41:08 +11:00
sysfs.c cxl: Disable prefault_mode in Radix mode 2018-06-02 01:48:05 +10:00
trace.c cxl: Add tracepoints 2015-01-22 17:31:51 +11:00
trace.h cxl: Add psl9 specific code 2017-04-13 23:34:31 +10:00
vphb.c powerpc: rename dma_direct_ to dma_nommu_ 2018-01-10 16:41:14 +01:00