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1b3f25ce99
Updated supported SoC name for pwm-samsung. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
52 lines
2.2 KiB
Plaintext
52 lines
2.2 KiB
Plaintext
* Samsung PWM timers
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Samsung SoCs contain PWM timer blocks which can be used for system clock source
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and clock event timers, as well as to drive SoC outputs with PWM signal. Each
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PWM timer block provides 5 PWM channels (not all of them can drive physical
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outputs - see SoC and board manual).
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Be aware that the clocksource driver supports only uniprocessor systems.
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Required properties:
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- compatible : should be one of following:
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samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
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samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
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samsung,s5p6440-pwm - for 32-bit timers present on S5P64x0 SoCs
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samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
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Exynos4210 rev0 SoCs
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samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210,
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Exynos4x12, Exynos5250 and Exynos5420 SoCs
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- reg: base address and size of register area
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- interrupts: list of timer interrupts (one interrupt per timer, starting at
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timer 0)
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- clock-names: should contain all following required clock names:
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- "timers" - PWM base clock used to generate PWM signals,
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and any subset of following optional clock names:
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- "pwm-tclk0" - first external PWM clock source,
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- "pwm-tclk1" - second external PWM clock source.
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Note that not all IP variants allow using all external clock sources.
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Refer to SoC documentation to learn which clock source configurations
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are available.
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- clocks: should contain clock specifiers of all clocks, which input names
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have been specified in clock-names property, in same order.
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- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
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the cells format. The only third cell flag supported by this binding is
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PWM_POLARITY_INVERTED.
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Optional properties:
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- samsung,pwm-outputs: list of PWM channels used as PWM outputs on particular
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platform - an array of up to 5 elements being indices of PWM channels
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(from 0 to 4), the order does not matter.
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Example:
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pwm@7f006000 {
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compatible = "samsung,s3c6400-pwm";
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reg = <0x7f006000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <23>, <24>, <25>, <27>, <28>;
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clocks = <&clock 67>;
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clock-names = "timers";
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samsung,pwm-outputs = <0>, <1>;
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#pwm-cells = <3>;
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}
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