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b5fe363b7d
Impact: clean up We can autodetect those system that need cluster apic, and update genapic accordingly. We can also remove wakeup.h for e7000, because it's default one is now the same as overall default mach_wakecpu.h Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
386 lines
8.3 KiB
C
386 lines
8.3 KiB
C
/*
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* Written by: Garry Forsgren, Unisys Corporation
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* Natalie Protasevich, Unisys Corporation
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* This file contains the code to configure and interface
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* with Unisys ES7000 series hardware system manager.
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*
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* Copyright (c) 2003 Unisys Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it would be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write the Free Software Foundation, Inc., 59
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* Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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* Contact information: Unisys Corporation, Township Line & Union Meeting
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* Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or:
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*
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* http://www.unisys.com
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/smp.h>
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#include <linux/string.h>
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#include <linux/spinlock.h>
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#include <linux/errno.h>
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#include <linux/notifier.h>
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#include <linux/reboot.h>
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#include <linux/init.h>
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#include <linux/acpi.h>
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#include <asm/io.h>
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#include <asm/nmi.h>
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#include <asm/smp.h>
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#include <asm/atomic.h>
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#include <asm/apicdef.h>
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#include <mach_mpparse.h>
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#include <asm/genapic.h>
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#include <asm/setup.h>
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/*
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* ES7000 chipsets
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*/
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#define NON_UNISYS 0
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#define ES7000_CLASSIC 1
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#define ES7000_ZORRO 2
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#define MIP_REG 1
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#define MIP_PSAI_REG 4
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#define MIP_BUSY 1
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#define MIP_SPIN 0xf0000
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#define MIP_VALID 0x0100000000000000ULL
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#define MIP_PORT(VALUE) ((VALUE >> 32) & 0xffff)
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#define MIP_RD_LO(VALUE) (VALUE & 0xffffffff)
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struct mip_reg_info {
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unsigned long long mip_info;
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unsigned long long delivery_info;
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unsigned long long host_reg;
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unsigned long long mip_reg;
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};
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struct part_info {
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unsigned char type;
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unsigned char length;
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unsigned char part_id;
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unsigned char apic_mode;
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unsigned long snum;
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char ptype[16];
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char sname[64];
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char pname[64];
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};
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struct psai {
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unsigned long long entry_type;
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unsigned long long addr;
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unsigned long long bep_addr;
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};
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struct es7000_mem_info {
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unsigned char type;
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unsigned char length;
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unsigned char resv[6];
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unsigned long long start;
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unsigned long long size;
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};
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struct es7000_oem_table {
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unsigned long long hdr;
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struct mip_reg_info mip;
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struct part_info pif;
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struct es7000_mem_info shm;
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struct psai psai;
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};
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#ifdef CONFIG_ACPI
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struct oem_table {
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struct acpi_table_header Header;
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u32 OEMTableAddr;
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u32 OEMTableSize;
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};
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extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
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extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
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#endif
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struct mip_reg {
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unsigned long long off_0;
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unsigned long long off_8;
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unsigned long long off_10;
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unsigned long long off_18;
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unsigned long long off_20;
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unsigned long long off_28;
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unsigned long long off_30;
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unsigned long long off_38;
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};
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#define MIP_SW_APIC 0x1020b
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#define MIP_FUNC(VALUE) (VALUE & 0xff)
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/*
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* ES7000 Globals
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*/
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static volatile unsigned long *psai = NULL;
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static struct mip_reg *mip_reg;
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static struct mip_reg *host_reg;
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static int mip_port;
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static unsigned long mip_addr, host_addr;
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int es7000_plat;
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/*
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* GSI override for ES7000 platforms.
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*/
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static unsigned int base;
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static int
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es7000_rename_gsi(int ioapic, int gsi)
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{
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if (es7000_plat == ES7000_ZORRO)
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return gsi;
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if (!base) {
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int i;
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for (i = 0; i < nr_ioapics; i++)
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base += nr_ioapic_registers[i];
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}
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if (!ioapic && (gsi < 16))
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gsi += base;
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return gsi;
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}
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static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
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{
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unsigned long vect = 0, psaival = 0;
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if (psai == NULL)
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return -1;
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vect = ((unsigned long)__pa(eip)/0x1000) << 16;
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psaival = (0x1000000 | vect | cpu);
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while (*psai & 0x1000000)
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;
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*psai = psaival;
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return 0;
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}
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static void noop_wait_for_deassert(atomic_t *deassert_not_used)
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{
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}
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static int __init es7000_update_genapic(void)
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{
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genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
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/* MPENTIUMIII */
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if (boot_cpu_data.x86 == 6 &&
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(boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) {
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es7000_update_genapic_to_cluster();
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genapic->wait_for_init_deassert = noop_wait_for_deassert;
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genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
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}
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return 0;
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}
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void __init
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setup_unisys(void)
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{
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/*
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* Determine the generation of the ES7000 currently running.
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*
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* es7000_plat = 1 if the machine is a 5xx ES7000 box
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* es7000_plat = 2 if the machine is a x86_64 ES7000 box
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*
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*/
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if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
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es7000_plat = ES7000_ZORRO;
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else
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es7000_plat = ES7000_CLASSIC;
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ioapic_renumber_irq = es7000_rename_gsi;
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x86_quirks->update_genapic = es7000_update_genapic;
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}
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/*
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* Parse the OEM Table
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*/
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int __init
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parse_unisys_oem (char *oemptr)
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{
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int i;
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int success = 0;
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unsigned char type, size;
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unsigned long val;
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char *tp = NULL;
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struct psai *psaip = NULL;
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struct mip_reg_info *mi;
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struct mip_reg *host, *mip;
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tp = oemptr;
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tp += 8;
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for (i=0; i <= 6; i++) {
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type = *tp++;
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size = *tp++;
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tp -= 2;
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switch (type) {
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case MIP_REG:
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mi = (struct mip_reg_info *)tp;
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val = MIP_RD_LO(mi->host_reg);
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host_addr = val;
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host = (struct mip_reg *)val;
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host_reg = __va(host);
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val = MIP_RD_LO(mi->mip_reg);
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mip_port = MIP_PORT(mi->mip_info);
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mip_addr = val;
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mip = (struct mip_reg *)val;
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mip_reg = __va(mip);
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pr_debug("es7000_mipcfg: host_reg = 0x%lx \n",
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(unsigned long)host_reg);
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pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n",
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(unsigned long)mip_reg);
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success++;
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break;
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case MIP_PSAI_REG:
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psaip = (struct psai *)tp;
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if (tp != NULL) {
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if (psaip->addr)
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psai = __va(psaip->addr);
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else
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psai = NULL;
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success++;
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}
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break;
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default:
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break;
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}
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tp += size;
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}
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if (success < 2) {
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es7000_plat = NON_UNISYS;
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} else
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setup_unisys();
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return es7000_plat;
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}
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#ifdef CONFIG_ACPI
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static unsigned long oem_addrX;
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static unsigned long oem_size;
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int __init find_unisys_acpi_oem_table(unsigned long *oem_addr)
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{
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struct acpi_table_header *header = NULL;
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int i = 0;
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acpi_size tbl_size;
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while (ACPI_SUCCESS(acpi_get_table_with_size("OEM1", i++, &header, &tbl_size))) {
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if (!memcmp((char *) &header->oem_id, "UNISYS", 6)) {
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struct oem_table *t = (struct oem_table *)header;
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oem_addrX = t->OEMTableAddr;
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oem_size = t->OEMTableSize;
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early_acpi_os_unmap_memory(header, tbl_size);
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*oem_addr = (unsigned long)__acpi_map_table(oem_addrX,
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oem_size);
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return 0;
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}
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early_acpi_os_unmap_memory(header, tbl_size);
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}
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return -1;
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}
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void __init unmap_unisys_acpi_oem_table(unsigned long oem_addr)
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{
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if (!oem_addr)
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return;
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__acpi_unmap_table((char *)oem_addr, oem_size);
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}
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#endif
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static void
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es7000_spin(int n)
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{
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int i = 0;
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while (i++ < n)
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rep_nop();
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}
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static int __init
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es7000_mip_write(struct mip_reg *mip_reg)
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{
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int status = 0;
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int spin;
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spin = MIP_SPIN;
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while (((unsigned long long)host_reg->off_38 &
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(unsigned long long)MIP_VALID) != 0) {
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if (--spin <= 0) {
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printk("es7000_mip_write: Timeout waiting for Host Valid Flag");
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return -1;
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}
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es7000_spin(MIP_SPIN);
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}
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memcpy(host_reg, mip_reg, sizeof(struct mip_reg));
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outb(1, mip_port);
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spin = MIP_SPIN;
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while (((unsigned long long)mip_reg->off_38 &
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(unsigned long long)MIP_VALID) == 0) {
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if (--spin <= 0) {
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printk("es7000_mip_write: Timeout waiting for MIP Valid Flag");
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return -1;
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}
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es7000_spin(MIP_SPIN);
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}
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status = ((unsigned long long)mip_reg->off_0 &
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(unsigned long long)0xffff0000000000ULL) >> 48;
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mip_reg->off_38 = ((unsigned long long)mip_reg->off_38 &
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(unsigned long long)~MIP_VALID);
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return status;
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}
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void __init
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es7000_sw_apic(void)
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{
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if (es7000_plat) {
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int mip_status;
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struct mip_reg es7000_mip_reg;
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printk("ES7000: Enabling APIC mode.\n");
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memset(&es7000_mip_reg, 0, sizeof(struct mip_reg));
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es7000_mip_reg.off_0 = MIP_SW_APIC;
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es7000_mip_reg.off_38 = (MIP_VALID);
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while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0)
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printk("es7000_sw_apic: command failed, status = %x\n",
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mip_status);
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return;
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}
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}
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