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Unlike what was initially claimed in the PHY binding, the interrupt property of a PHY can be omitted, and the OS will turn to polling instead. Document that. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Rob Herring <robh@kernel.org>
178 lines
5.0 KiB
YAML
178 lines
5.0 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Ethernet PHY Generic Binding
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maintainers:
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- Andrew Lunn <andrew@lunn.ch>
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- Florian Fainelli <f.fainelli@gmail.com>
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- Heiner Kallweit <hkallweit1@gmail.com>
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# The dt-schema tools will generate a select statement first by using
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# the compatible, and second by using the node name if any. In our
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# case, the node name is the one we want to match on, while the
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# compatible is optional.
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select:
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properties:
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$nodename:
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pattern: "^ethernet-phy(@[a-f0-9]+)?$"
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required:
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- $nodename
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properties:
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$nodename:
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pattern: "^ethernet-phy(@[a-f0-9]+)?$"
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compatible:
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oneOf:
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- const: ethernet-phy-ieee802.3-c22
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description: PHYs that implement IEEE802.3 clause 22
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- const: ethernet-phy-ieee802.3-c45
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description: PHYs that implement IEEE802.3 clause 45
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- pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
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description:
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If the PHY reports an incorrect ID (or none at all) then the
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compatible list may contain an entry with the correct PHY ID
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in the above form.
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The first group of digits is the 16 bit Phy Identifier 1
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register, this is the chip vendor OUI bits 3:18. The
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second group of digits is the Phy Identifier 2 register,
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this is the chip vendor OUI bits 19:24, followed by 10
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bits of a vendor specific ID.
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- items:
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- pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
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- const: ethernet-phy-ieee802.3-c45
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reg:
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minimum: 0
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maximum: 31
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description:
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The ID number for the PHY.
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interrupts:
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maxItems: 1
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max-speed:
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enum:
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- 10
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- 100
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- 1000
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- 2500
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- 5000
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- 10000
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- 20000
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- 25000
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- 40000
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- 50000
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- 56000
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- 100000
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- 200000
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description:
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Maximum PHY supported speed in Mbits / seconds.
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broken-turn-around:
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$ref: /schemas/types.yaml#definitions/flag
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description:
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If set, indicates the PHY device does not correctly release
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the turn around line low at the end of a MDIO transaction.
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enet-phy-lane-swap:
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$ref: /schemas/types.yaml#definitions/flag
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description:
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If set, indicates the PHY will swap the TX/RX lanes to
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compensate for the board being designed with the lanes
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swapped.
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eee-broken-100tx:
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$ref: /schemas/types.yaml#definitions/flag
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description:
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Mark the corresponding energy efficient ethernet mode as
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broken and request the ethernet to stop advertising it.
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eee-broken-1000t:
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$ref: /schemas/types.yaml#definitions/flag
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description:
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Mark the corresponding energy efficient ethernet mode as
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broken and request the ethernet to stop advertising it.
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eee-broken-10gt:
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$ref: /schemas/types.yaml#definitions/flag
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description:
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Mark the corresponding energy efficient ethernet mode as
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broken and request the ethernet to stop advertising it.
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eee-broken-1000kx:
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$ref: /schemas/types.yaml#definitions/flag
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description:
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Mark the corresponding energy efficient ethernet mode as
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broken and request the ethernet to stop advertising it.
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eee-broken-10gkx4:
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$ref: /schemas/types.yaml#definitions/flag
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description:
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Mark the corresponding energy efficient ethernet mode as
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broken and request the ethernet to stop advertising it.
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eee-broken-10gkr:
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$ref: /schemas/types.yaml#definitions/flag
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description:
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Mark the corresponding energy efficient ethernet mode as
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broken and request the ethernet to stop advertising it.
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phy-is-integrated:
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$ref: /schemas/types.yaml#definitions/flag
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description:
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If set, indicates that the PHY is integrated into the same
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physical package as the Ethernet MAC. If needed, muxers
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should be configured to ensure the integrated PHY is
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used. The absence of this property indicates the muxers
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should be configured so that the external PHY is used.
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resets:
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maxItems: 1
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reset-names:
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const: phy
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reset-gpios:
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maxItems: 1
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description:
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The GPIO phandle and specifier for the PHY reset signal.
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reset-assert-us:
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description:
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Delay after the reset was asserted in microseconds. If this
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property is missing the delay will be skipped.
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reset-deassert-us:
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description:
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Delay after the reset was deasserted in microseconds. If
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this property is missing the delay will be skipped.
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required:
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- reg
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examples:
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- |
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ethernet {
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-phy@0 {
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compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c45";
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interrupt-parent = <&PIC>;
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interrupts = <35 1>;
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reg = <0>;
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resets = <&rst 8>;
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reset-names = "phy";
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reset-gpios = <&gpio1 4 1>;
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reset-assert-us = <1000>;
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reset-deassert-us = <2000>;
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};
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};
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