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Allocating IO and IRQ resources to LPC devices is in-theory an operation for the host, however ASPEED don't appear to expose this capability outside the BMC (e.g. SuperIO). Instead, we are left with BMC-internal registers for managing these resources, so introduce a devicetree property for KCS devices to describe SerIRQ properties. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Rob Herring <robh@kernel.org> Message-Id: <20210608104757.582199-14-andrew@aj.id.au> Signed-off-by: Corey Minyard <cminyard@mvista.com>
107 lines
2.7 KiB
YAML
107 lines
2.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ASPEED BMC KCS Devices
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maintainers:
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- Andrew Jeffery <andrew@aj.id.au>
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description: |
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The Aspeed BMC SoCs typically use the Keyboard-Controller-Style (KCS)
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interfaces on the LPC bus for in-band IPMI communication with their host.
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properties:
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compatible:
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oneOf:
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- description: Channel ID derived from reg
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items:
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enum:
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- aspeed,ast2400-kcs-bmc-v2
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- aspeed,ast2500-kcs-bmc-v2
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- aspeed,ast2600-kcs-bmc
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- description: Old-style with explicit channel ID, no reg
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deprecated: true
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items:
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enum:
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- aspeed,ast2400-kcs-bmc
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- aspeed,ast2500-kcs-bmc
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interrupts:
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maxItems: 1
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reg:
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# maxItems: 3
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items:
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- description: IDR register
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- description: ODR register
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- description: STR register
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aspeed,lpc-io-reg:
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$ref: '/schemas/types.yaml#/definitions/uint32-array'
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minItems: 1
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maxItems: 2
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description: |
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The host CPU LPC IO data and status addresses for the device. For most
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channels the status address is derived from the data address, but the
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status address may be optionally provided.
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aspeed,lpc-interrupts:
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$ref: "/schemas/types.yaml#/definitions/uint32-array"
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minItems: 2
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maxItems: 2
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description: |
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A 2-cell property expressing the LPC SerIRQ number and the interrupt
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level/sense encoding (specified in the standard fashion).
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Note that the generated interrupt is issued from the BMC to the host, and
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thus the target interrupt controller is not captured by the BMC's
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devicetree.
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kcs_chan:
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deprecated: true
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$ref: '/schemas/types.yaml#/definitions/uint32'
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description: The LPC channel number in the controller
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kcs_addr:
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deprecated: true
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$ref: '/schemas/types.yaml#/definitions/uint32'
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description: The host CPU IO map address
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required:
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- compatible
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- interrupts
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additionalProperties: false
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- aspeed,ast2400-kcs-bmc
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- aspeed,ast2500-kcs-bmc
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then:
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required:
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- kcs_chan
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- kcs_addr
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else:
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required:
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- reg
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- aspeed,lpc-io-reg
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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kcs3: kcs@24 {
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compatible = "aspeed,ast2600-kcs-bmc";
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reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
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aspeed,lpc-io-reg = <0xca2>;
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aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
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interrupts = <8>;
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};
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