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bb3860cc02
Get rid of private "nmi_save_areas" slab cache. The only reason this was
introduced years ago was that with some slab debugging options allocations
would only guarantee a minimum alignment of ARCH_KMALLOC_MINALIGN, which
was eight bytes back then. This is not sufficient for the extended machine
check save area.
However since commit 59bb47985c
("mm, sl[aou]b: guarantee natural
alignment for kmalloc(power-of-two)") kmalloc guarantees a power-of-two
alignment even with debugging options enabled.
Therefore the private slab cache can be removed.
Reviewed-by: Alexander Gordeev <agordeev@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
528 lines
14 KiB
C
528 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Machine check handler
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*
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* Copyright IBM Corp. 2000, 2009
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* Author(s): Ingo Adlung <adlung@de.ibm.com>,
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* Martin Schwidefsky <schwidefsky@de.ibm.com>,
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* Cornelia Huck <cornelia.huck@de.ibm.com>,
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*/
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#include <linux/kernel_stat.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/entry-common.h>
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#include <linux/hardirq.h>
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#include <linux/log2.h>
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#include <linux/kprobes.h>
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#include <linux/kmemleak.h>
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#include <linux/time.h>
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#include <linux/module.h>
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#include <linux/sched/signal.h>
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#include <linux/kvm_host.h>
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#include <linux/export.h>
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#include <asm/lowcore.h>
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#include <asm/smp.h>
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#include <asm/stp.h>
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#include <asm/cputime.h>
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#include <asm/nmi.h>
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#include <asm/crw.h>
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#include <asm/switch_to.h>
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#include <asm/ctl_reg.h>
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#include <asm/asm-offsets.h>
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#include <asm/pai.h>
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#include <asm/vx-insn.h>
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struct mcck_struct {
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unsigned int kill_task : 1;
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unsigned int channel_report : 1;
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unsigned int warning : 1;
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unsigned int stp_queue : 1;
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unsigned long mcck_code;
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};
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static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck);
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static inline int nmi_needs_mcesa(void)
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{
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return MACHINE_HAS_VX || MACHINE_HAS_GS;
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}
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/*
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* The initial machine check extended save area for the boot CPU.
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* It will be replaced on the boot CPU reinit with an allocated
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* structure. The structure is required for machine check happening
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* early in the boot process.
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*/
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static struct mcesa boot_mcesa __aligned(MCESA_MAX_SIZE);
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void __init nmi_alloc_mcesa_early(u64 *mcesad)
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{
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if (!nmi_needs_mcesa())
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return;
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*mcesad = __pa(&boot_mcesa);
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if (MACHINE_HAS_GS)
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*mcesad |= ilog2(MCESA_MAX_SIZE);
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}
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int nmi_alloc_mcesa(u64 *mcesad)
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{
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unsigned long size;
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void *origin;
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*mcesad = 0;
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if (!nmi_needs_mcesa())
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return 0;
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size = MACHINE_HAS_GS ? MCESA_MAX_SIZE : MCESA_MIN_SIZE;
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origin = kmalloc(size, GFP_KERNEL);
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if (!origin)
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return -ENOMEM;
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/* The pointer is stored with mcesa_bits ORed in */
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kmemleak_not_leak(origin);
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*mcesad = __pa(origin);
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if (MACHINE_HAS_GS)
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*mcesad |= ilog2(MCESA_MAX_SIZE);
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return 0;
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}
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void nmi_free_mcesa(u64 *mcesad)
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{
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if (!nmi_needs_mcesa())
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return;
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kfree(__va(*mcesad & MCESA_ORIGIN_MASK));
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}
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static __always_inline char *nmi_puts(char *dest, const char *src)
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{
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while (*src)
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*dest++ = *src++;
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*dest = 0;
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return dest;
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}
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static __always_inline char *u64_to_hex(char *dest, u64 val)
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{
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int i, num;
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for (i = 1; i <= 16; i++) {
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num = (val >> (64 - 4 * i)) & 0xf;
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if (num >= 10)
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*dest++ = 'A' + num - 10;
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else
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*dest++ = '0' + num;
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}
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*dest = 0;
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return dest;
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}
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static notrace void s390_handle_damage(void)
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{
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union ctlreg0 cr0, cr0_new;
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char message[100];
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psw_t psw_save;
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char *ptr;
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smp_emergency_stop();
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diag_amode31_ops.diag308_reset();
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ptr = nmi_puts(message, "System stopped due to unrecoverable machine check, code: 0x");
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u64_to_hex(ptr, S390_lowcore.mcck_interruption_code);
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/*
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* Disable low address protection and make machine check new PSW a
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* disabled wait PSW. Any additional machine check cannot be handled.
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*/
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__ctl_store(cr0.val, 0, 0);
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cr0_new = cr0;
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cr0_new.lap = 0;
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__ctl_load(cr0_new.val, 0, 0);
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psw_save = S390_lowcore.mcck_new_psw;
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psw_bits(S390_lowcore.mcck_new_psw).io = 0;
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psw_bits(S390_lowcore.mcck_new_psw).ext = 0;
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psw_bits(S390_lowcore.mcck_new_psw).wait = 1;
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sclp_emergency_printk(message);
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/*
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* Restore machine check new PSW and control register 0 to original
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* values. This makes possible system dump analysis easier.
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*/
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S390_lowcore.mcck_new_psw = psw_save;
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__ctl_load(cr0.val, 0, 0);
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disabled_wait();
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while (1);
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}
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NOKPROBE_SYMBOL(s390_handle_damage);
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/*
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* Main machine check handler function. Will be called with interrupts disabled
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* and machine checks enabled.
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*/
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void __s390_handle_mcck(void)
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{
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struct mcck_struct mcck;
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/*
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* Disable machine checks and get the current state of accumulated
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* machine checks. Afterwards delete the old state and enable machine
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* checks again.
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*/
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local_mcck_disable();
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mcck = *this_cpu_ptr(&cpu_mcck);
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memset(this_cpu_ptr(&cpu_mcck), 0, sizeof(mcck));
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local_mcck_enable();
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if (mcck.channel_report)
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crw_handle_channel_report();
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/*
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* A warning may remain for a prolonged period on the bare iron.
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* (actually until the machine is powered off, or the problem is gone)
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* So we just stop listening for the WARNING MCH and avoid continuously
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* being interrupted. One caveat is however, that we must do this per
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* processor and cannot use the smp version of ctl_clear_bit().
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* On VM we only get one interrupt per virtally presented machinecheck.
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* Though one suffices, we may get one interrupt per (virtual) cpu.
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*/
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if (mcck.warning) { /* WARNING pending ? */
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static int mchchk_wng_posted = 0;
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/* Use single cpu clear, as we cannot handle smp here. */
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__ctl_clear_bit(14, 24); /* Disable WARNING MCH */
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if (xchg(&mchchk_wng_posted, 1) == 0)
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kill_cad_pid(SIGPWR, 1);
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}
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if (mcck.stp_queue)
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stp_queue_work();
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if (mcck.kill_task) {
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local_irq_enable();
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printk(KERN_EMERG "mcck: Terminating task because of machine "
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"malfunction (code 0x%016lx).\n", mcck.mcck_code);
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printk(KERN_EMERG "mcck: task: %s, pid: %d.\n",
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current->comm, current->pid);
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make_task_dead(SIGSEGV);
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}
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}
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void noinstr s390_handle_mcck(struct pt_regs *regs)
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{
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trace_hardirqs_off();
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pai_kernel_enter(regs);
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__s390_handle_mcck();
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pai_kernel_exit(regs);
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trace_hardirqs_on();
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}
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/*
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* returns 0 if register contents could be validated
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* returns 1 otherwise
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*/
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static int notrace s390_validate_registers(union mci mci)
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{
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struct mcesa *mcesa;
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void *fpt_save_area;
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union ctlreg2 cr2;
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int kill_task;
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u64 zero;
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kill_task = 0;
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zero = 0;
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if (!mci.gr || !mci.fp)
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kill_task = 1;
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fpt_save_area = &S390_lowcore.floating_pt_save_area;
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if (!mci.fc) {
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kill_task = 1;
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asm volatile(
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" lfpc %0\n"
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:
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: "Q" (zero));
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} else {
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asm volatile(
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" lfpc %0\n"
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:
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: "Q" (S390_lowcore.fpt_creg_save_area));
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}
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mcesa = __va(S390_lowcore.mcesad & MCESA_ORIGIN_MASK);
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if (!MACHINE_HAS_VX) {
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/* Validate floating point registers */
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asm volatile(
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" ld 0,0(%0)\n"
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" ld 1,8(%0)\n"
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" ld 2,16(%0)\n"
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" ld 3,24(%0)\n"
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" ld 4,32(%0)\n"
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" ld 5,40(%0)\n"
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" ld 6,48(%0)\n"
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" ld 7,56(%0)\n"
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" ld 8,64(%0)\n"
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" ld 9,72(%0)\n"
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" ld 10,80(%0)\n"
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" ld 11,88(%0)\n"
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" ld 12,96(%0)\n"
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" ld 13,104(%0)\n"
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" ld 14,112(%0)\n"
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" ld 15,120(%0)\n"
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:
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: "a" (fpt_save_area)
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: "memory");
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} else {
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/* Validate vector registers */
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union ctlreg0 cr0;
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/*
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* The vector validity must only be checked if not running a
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* KVM guest. For KVM guests the machine check is forwarded by
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* KVM and it is the responsibility of the guest to take
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* appropriate actions. The host vector or FPU values have been
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* saved by KVM and will be restored by KVM.
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*/
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if (!mci.vr && !test_cpu_flag(CIF_MCCK_GUEST))
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kill_task = 1;
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cr0.val = S390_lowcore.cregs_save_area[0];
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cr0.afp = cr0.vx = 1;
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__ctl_load(cr0.val, 0, 0);
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asm volatile(
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" la 1,%0\n"
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" VLM 0,15,0,1\n"
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" VLM 16,31,256,1\n"
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:
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: "Q" (*(struct vx_array *)mcesa->vector_save_area)
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: "1");
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__ctl_load(S390_lowcore.cregs_save_area[0], 0, 0);
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}
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/* Validate access registers */
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asm volatile(
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" lam 0,15,0(%0)\n"
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:
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: "a" (&S390_lowcore.access_regs_save_area)
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: "memory");
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if (!mci.ar)
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kill_task = 1;
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/* Validate guarded storage registers */
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cr2.val = S390_lowcore.cregs_save_area[2];
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if (cr2.gse) {
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if (!mci.gs) {
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/*
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* 2 cases:
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* - machine check in kernel or userspace
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* - machine check while running SIE (KVM guest)
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* For kernel or userspace the userspace values of
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* guarded storage control can not be recreated, the
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* process must be terminated.
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* For SIE the guest values of guarded storage can not
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* be recreated. This is either due to a bug or due to
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* GS being disabled in the guest. The guest will be
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* notified by KVM code and the guests machine check
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* handling must take care of this. The host values
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* are saved by KVM and are not affected.
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*/
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if (!test_cpu_flag(CIF_MCCK_GUEST))
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kill_task = 1;
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} else {
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load_gs_cb((struct gs_cb *)mcesa->guarded_storage_save_area);
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}
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}
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/*
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* The getcpu vdso syscall reads CPU number from the programmable
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* field of the TOD clock. Disregard the TOD programmable register
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* validity bit and load the CPU number into the TOD programmable
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* field unconditionally.
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*/
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set_tod_programmable_field(raw_smp_processor_id());
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/* Validate clock comparator register */
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set_clock_comparator(S390_lowcore.clock_comparator);
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if (!mci.ms || !mci.pm || !mci.ia)
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kill_task = 1;
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return kill_task;
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}
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NOKPROBE_SYMBOL(s390_validate_registers);
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/*
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* Backup the guest's machine check info to its description block
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*/
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static void notrace s390_backup_mcck_info(struct pt_regs *regs)
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{
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struct mcck_volatile_info *mcck_backup;
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struct sie_page *sie_page;
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/* r14 contains the sie block, which was set in sie64a */
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struct kvm_s390_sie_block *sie_block =
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(struct kvm_s390_sie_block *) regs->gprs[14];
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if (sie_block == NULL)
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/* Something's seriously wrong, stop system. */
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s390_handle_damage();
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sie_page = container_of(sie_block, struct sie_page, sie_block);
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mcck_backup = &sie_page->mcck_info;
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mcck_backup->mcic = S390_lowcore.mcck_interruption_code &
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~(MCCK_CODE_CP | MCCK_CODE_EXT_DAMAGE);
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mcck_backup->ext_damage_code = S390_lowcore.external_damage_code;
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mcck_backup->failing_storage_address
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= S390_lowcore.failing_storage_address;
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}
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NOKPROBE_SYMBOL(s390_backup_mcck_info);
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#define MAX_IPD_COUNT 29
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#define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */
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#define ED_STP_ISLAND 6 /* External damage STP island check */
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#define ED_STP_SYNC 7 /* External damage STP sync check */
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#define MCCK_CODE_NO_GUEST (MCCK_CODE_CP | MCCK_CODE_EXT_DAMAGE)
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/*
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* machine check handler.
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*/
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int notrace s390_do_machine_check(struct pt_regs *regs)
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{
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static int ipd_count;
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static DEFINE_SPINLOCK(ipd_lock);
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static unsigned long long last_ipd;
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struct mcck_struct *mcck;
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unsigned long long tmp;
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irqentry_state_t irq_state;
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union mci mci;
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unsigned long mcck_dam_code;
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int mcck_pending = 0;
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irq_state = irqentry_nmi_enter(regs);
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if (user_mode(regs))
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update_timer_mcck();
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inc_irq_stat(NMI_NMI);
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mci.val = S390_lowcore.mcck_interruption_code;
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mcck = this_cpu_ptr(&cpu_mcck);
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/*
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* Reinject the instruction processing damages' machine checks
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* including Delayed Access Exception into the guest
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* instead of damaging the host if they happen in the guest.
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*/
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if (mci.pd && !test_cpu_flag(CIF_MCCK_GUEST)) {
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if (mci.b) {
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/* Processing backup -> verify if we can survive this */
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u64 z_mcic, o_mcic, t_mcic;
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z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29);
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o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
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1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
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1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 |
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1ULL<<16);
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t_mcic = mci.val;
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if (((t_mcic & z_mcic) != 0) ||
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((t_mcic & o_mcic) != o_mcic)) {
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s390_handle_damage();
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}
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/*
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* Nullifying exigent condition, therefore we might
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* retry this instruction.
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*/
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spin_lock(&ipd_lock);
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tmp = get_tod_clock();
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if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME)
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ipd_count++;
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else
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ipd_count = 1;
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last_ipd = tmp;
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if (ipd_count == MAX_IPD_COUNT)
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s390_handle_damage();
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spin_unlock(&ipd_lock);
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} else {
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/* Processing damage -> stopping machine */
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s390_handle_damage();
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}
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}
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if (s390_validate_registers(mci)) {
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if (!user_mode(regs))
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s390_handle_damage();
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/*
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* Couldn't restore all register contents for the
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* user space process -> mark task for termination.
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*/
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mcck->kill_task = 1;
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mcck->mcck_code = mci.val;
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mcck_pending = 1;
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}
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/*
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* Backup the machine check's info if it happens when the guest
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* is running.
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*/
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if (test_cpu_flag(CIF_MCCK_GUEST))
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s390_backup_mcck_info(regs);
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if (mci.cd) {
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/* Timing facility damage */
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s390_handle_damage();
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}
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if (mci.ed && mci.ec) {
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/* External damage */
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if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC))
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mcck->stp_queue |= stp_sync_check();
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if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND))
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mcck->stp_queue |= stp_island_check();
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mcck_pending = 1;
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}
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/*
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* Reinject storage related machine checks into the guest if they
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* happen when the guest is running.
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*/
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if (!test_cpu_flag(CIF_MCCK_GUEST)) {
|
|
/* Storage error uncorrected */
|
|
if (mci.se)
|
|
s390_handle_damage();
|
|
/* Storage key-error uncorrected */
|
|
if (mci.ke)
|
|
s390_handle_damage();
|
|
/* Storage degradation */
|
|
if (mci.ds && mci.fa)
|
|
s390_handle_damage();
|
|
}
|
|
if (mci.cp) {
|
|
/* Channel report word pending */
|
|
mcck->channel_report = 1;
|
|
mcck_pending = 1;
|
|
}
|
|
if (mci.w) {
|
|
/* Warning pending */
|
|
mcck->warning = 1;
|
|
mcck_pending = 1;
|
|
}
|
|
|
|
/*
|
|
* If there are only Channel Report Pending and External Damage
|
|
* machine checks, they will not be reinjected into the guest
|
|
* because they refer to host conditions only.
|
|
*/
|
|
mcck_dam_code = (mci.val & MCIC_SUBCLASS_MASK);
|
|
if (test_cpu_flag(CIF_MCCK_GUEST) &&
|
|
(mcck_dam_code & MCCK_CODE_NO_GUEST) != mcck_dam_code) {
|
|
/* Set exit reason code for host's later handling */
|
|
*((long *)(regs->gprs[15] + __SF_SIE_REASON)) = -EINTR;
|
|
}
|
|
clear_cpu_flag(CIF_MCCK_GUEST);
|
|
|
|
if (user_mode(regs) && mcck_pending) {
|
|
irqentry_nmi_exit(regs, irq_state);
|
|
return 1;
|
|
}
|
|
|
|
if (mcck_pending)
|
|
schedule_mcck_handler();
|
|
|
|
irqentry_nmi_exit(regs, irq_state);
|
|
return 0;
|
|
}
|
|
NOKPROBE_SYMBOL(s390_do_machine_check);
|
|
|
|
static int __init machine_check_init(void)
|
|
{
|
|
ctl_set_bit(14, 25); /* enable external damage MCH */
|
|
ctl_set_bit(14, 27); /* enable system recovery MCH */
|
|
ctl_set_bit(14, 24); /* enable warning MCH */
|
|
return 0;
|
|
}
|
|
early_initcall(machine_check_init);
|