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8ec6552f4a
Add SFF-8485 v0.7 / SAS-1 smp-write-gpio register support to libsas. Defer SAS-2 support unless/until it defines an sgpio interface. Minimum implementation needed to get the lights blinking. try_test_sas_gpio_gp_bit() provides a common method to parse the incoming write data (raw bitstream), and the to_sas_gpio_gp_bit() helper routine can be used as a basis for the set/clear operations for the 'read' implementation. Host implementations parse as many bits (ODx.[012]) as are locally supported and report the number of registers successfully written. If the submitted data overruns the internal number of registers available report the write as a success with the number of bytes remaining reported in ->resid_len. Example (assuming an active backplane) set the "identify" pattern for the first 21 devices: smp_write_gpio --count=2 --data=92,49,24,92,24,92,49,24 -t 4 --index=1 /dev/bsg/sas_hostX Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
374 lines
9.3 KiB
C
374 lines
9.3 KiB
C
/*
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* Serial Attached SCSI (SAS) Expander discovery and configuration
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*
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* Copyright (C) 2007 James E.J. Bottomley
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* <James.Bottomley@HansenPartnership.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 only.
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*/
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#include <linux/scatterlist.h>
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#include <linux/blkdev.h>
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#include <linux/slab.h>
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#include "sas_internal.h"
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#include <scsi/scsi_transport.h>
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#include <scsi/scsi_transport_sas.h>
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#include "../scsi_sas_internal.h"
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static void sas_host_smp_discover(struct sas_ha_struct *sas_ha, u8 *resp_data,
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u8 phy_id)
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{
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struct sas_phy *phy;
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struct sas_rphy *rphy;
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if (phy_id >= sas_ha->num_phys) {
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resp_data[2] = SMP_RESP_NO_PHY;
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return;
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}
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resp_data[2] = SMP_RESP_FUNC_ACC;
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phy = sas_ha->sas_phy[phy_id]->phy;
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resp_data[9] = phy_id;
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resp_data[13] = phy->negotiated_linkrate;
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memcpy(resp_data + 16, sas_ha->sas_addr, SAS_ADDR_SIZE);
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memcpy(resp_data + 24, sas_ha->sas_phy[phy_id]->attached_sas_addr,
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SAS_ADDR_SIZE);
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resp_data[40] = (phy->minimum_linkrate << 4) |
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phy->minimum_linkrate_hw;
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resp_data[41] = (phy->maximum_linkrate << 4) |
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phy->maximum_linkrate_hw;
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if (!sas_ha->sas_phy[phy_id]->port ||
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!sas_ha->sas_phy[phy_id]->port->port_dev)
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return;
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rphy = sas_ha->sas_phy[phy_id]->port->port_dev->rphy;
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resp_data[12] = rphy->identify.device_type << 4;
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resp_data[14] = rphy->identify.initiator_port_protocols;
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resp_data[15] = rphy->identify.target_port_protocols;
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}
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/**
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* to_sas_gpio_gp_bit - given the gpio frame data find the byte/bit position of 'od'
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* @od: od bit to find
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* @data: incoming bitstream (from frame)
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* @index: requested data register index (from frame)
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* @count: total number of registers in the bitstream (from frame)
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* @bit: bit position of 'od' in the returned byte
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*
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* returns NULL if 'od' is not in 'data'
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*
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* From SFF-8485 v0.7:
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* "In GPIO_TX[1], bit 0 of byte 3 contains the first bit (i.e., OD0.0)
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* and bit 7 of byte 0 contains the 32nd bit (i.e., OD10.1).
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*
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* In GPIO_TX[2], bit 0 of byte 3 contains the 33rd bit (i.e., OD10.2)
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* and bit 7 of byte 0 contains the 64th bit (i.e., OD21.0)."
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*
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* The general-purpose (raw-bitstream) RX registers have the same layout
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* although 'od' is renamed 'id' for 'input data'.
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*
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* SFF-8489 defines the behavior of the LEDs in response to the 'od' values.
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*/
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static u8 *to_sas_gpio_gp_bit(unsigned int od, u8 *data, u8 index, u8 count, u8 *bit)
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{
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unsigned int reg;
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u8 byte;
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/* gp registers start at index 1 */
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if (index == 0)
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return NULL;
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index--; /* make index 0-based */
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if (od < index * 32)
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return NULL;
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od -= index * 32;
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reg = od >> 5;
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if (reg >= count)
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return NULL;
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od &= (1 << 5) - 1;
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byte = 3 - (od >> 3);
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*bit = od & ((1 << 3) - 1);
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return &data[reg * 4 + byte];
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}
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int try_test_sas_gpio_gp_bit(unsigned int od, u8 *data, u8 index, u8 count)
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{
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u8 *byte;
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u8 bit;
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byte = to_sas_gpio_gp_bit(od, data, index, count, &bit);
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if (!byte)
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return -1;
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return (*byte >> bit) & 1;
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}
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EXPORT_SYMBOL(try_test_sas_gpio_gp_bit);
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static int sas_host_smp_write_gpio(struct sas_ha_struct *sas_ha, u8 *resp_data,
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u8 reg_type, u8 reg_index, u8 reg_count,
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u8 *req_data)
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{
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struct sas_internal *i = to_sas_internal(sas_ha->core.shost->transportt);
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int written;
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if (i->dft->lldd_write_gpio == NULL) {
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resp_data[2] = SMP_RESP_FUNC_UNK;
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return 0;
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}
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written = i->dft->lldd_write_gpio(sas_ha, reg_type, reg_index,
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reg_count, req_data);
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if (written < 0) {
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resp_data[2] = SMP_RESP_FUNC_FAILED;
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written = 0;
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} else
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resp_data[2] = SMP_RESP_FUNC_ACC;
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return written;
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}
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static void sas_report_phy_sata(struct sas_ha_struct *sas_ha, u8 *resp_data,
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u8 phy_id)
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{
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struct sas_rphy *rphy;
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struct dev_to_host_fis *fis;
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int i;
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if (phy_id >= sas_ha->num_phys) {
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resp_data[2] = SMP_RESP_NO_PHY;
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return;
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}
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resp_data[2] = SMP_RESP_PHY_NO_SATA;
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if (!sas_ha->sas_phy[phy_id]->port)
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return;
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rphy = sas_ha->sas_phy[phy_id]->port->port_dev->rphy;
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fis = (struct dev_to_host_fis *)
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sas_ha->sas_phy[phy_id]->port->port_dev->frame_rcvd;
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if (rphy->identify.target_port_protocols != SAS_PROTOCOL_SATA)
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return;
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resp_data[2] = SMP_RESP_FUNC_ACC;
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resp_data[9] = phy_id;
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memcpy(resp_data + 16, sas_ha->sas_phy[phy_id]->attached_sas_addr,
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SAS_ADDR_SIZE);
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/* check to see if we have a valid d2h fis */
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if (fis->fis_type != 0x34)
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return;
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/* the d2h fis is required by the standard to be in LE format */
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for (i = 0; i < 20; i += 4) {
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u8 *dst = resp_data + 24 + i, *src =
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&sas_ha->sas_phy[phy_id]->port->port_dev->frame_rcvd[i];
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dst[0] = src[3];
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dst[1] = src[2];
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dst[2] = src[1];
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dst[3] = src[0];
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}
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}
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static void sas_phy_control(struct sas_ha_struct *sas_ha, u8 phy_id,
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u8 phy_op, enum sas_linkrate min,
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enum sas_linkrate max, u8 *resp_data)
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{
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struct sas_internal *i =
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to_sas_internal(sas_ha->core.shost->transportt);
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struct sas_phy_linkrates rates;
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if (phy_id >= sas_ha->num_phys) {
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resp_data[2] = SMP_RESP_NO_PHY;
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return;
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}
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switch (phy_op) {
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case PHY_FUNC_NOP:
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case PHY_FUNC_LINK_RESET:
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case PHY_FUNC_HARD_RESET:
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case PHY_FUNC_DISABLE:
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case PHY_FUNC_CLEAR_ERROR_LOG:
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case PHY_FUNC_CLEAR_AFFIL:
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case PHY_FUNC_TX_SATA_PS_SIGNAL:
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break;
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default:
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resp_data[2] = SMP_RESP_PHY_UNK_OP;
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return;
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}
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rates.minimum_linkrate = min;
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rates.maximum_linkrate = max;
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if (i->dft->lldd_control_phy(sas_ha->sas_phy[phy_id], phy_op, &rates))
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resp_data[2] = SMP_RESP_FUNC_FAILED;
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else
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resp_data[2] = SMP_RESP_FUNC_ACC;
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}
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int sas_smp_host_handler(struct Scsi_Host *shost, struct request *req,
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struct request *rsp)
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{
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u8 *req_data = NULL, *resp_data = NULL, *buf;
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struct sas_ha_struct *sas_ha = SHOST_TO_SAS_HA(shost);
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int error = -EINVAL;
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/* eight is the minimum size for request and response frames */
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if (blk_rq_bytes(req) < 8 || blk_rq_bytes(rsp) < 8)
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goto out;
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if (bio_offset(req->bio) + blk_rq_bytes(req) > PAGE_SIZE ||
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bio_offset(rsp->bio) + blk_rq_bytes(rsp) > PAGE_SIZE) {
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shost_printk(KERN_ERR, shost,
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"SMP request/response frame crosses page boundary");
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goto out;
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}
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req_data = kzalloc(blk_rq_bytes(req), GFP_KERNEL);
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/* make sure frame can always be built ... we copy
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* back only the requested length */
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resp_data = kzalloc(max(blk_rq_bytes(rsp), 128U), GFP_KERNEL);
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if (!req_data || !resp_data) {
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error = -ENOMEM;
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goto out;
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}
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local_irq_disable();
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buf = kmap_atomic(bio_page(req->bio), KM_USER0) + bio_offset(req->bio);
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memcpy(req_data, buf, blk_rq_bytes(req));
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kunmap_atomic(buf - bio_offset(req->bio), KM_USER0);
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local_irq_enable();
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if (req_data[0] != SMP_REQUEST)
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goto out;
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/* always succeeds ... even if we can't process the request
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* the result is in the response frame */
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error = 0;
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/* set up default don't know response */
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resp_data[0] = SMP_RESPONSE;
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resp_data[1] = req_data[1];
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resp_data[2] = SMP_RESP_FUNC_UNK;
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switch (req_data[1]) {
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case SMP_REPORT_GENERAL:
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req->resid_len -= 8;
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rsp->resid_len -= 32;
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resp_data[2] = SMP_RESP_FUNC_ACC;
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resp_data[9] = sas_ha->num_phys;
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break;
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case SMP_REPORT_MANUF_INFO:
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req->resid_len -= 8;
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rsp->resid_len -= 64;
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resp_data[2] = SMP_RESP_FUNC_ACC;
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memcpy(resp_data + 12, shost->hostt->name,
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SAS_EXPANDER_VENDOR_ID_LEN);
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memcpy(resp_data + 20, "libsas virt phy",
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SAS_EXPANDER_PRODUCT_ID_LEN);
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break;
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case SMP_READ_GPIO_REG:
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/* FIXME: need GPIO support in the transport class */
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break;
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case SMP_DISCOVER:
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req->resid_len -= 16;
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if ((int)req->resid_len < 0) {
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req->resid_len = 0;
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error = -EINVAL;
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goto out;
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}
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rsp->resid_len -= 56;
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sas_host_smp_discover(sas_ha, resp_data, req_data[9]);
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break;
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case SMP_REPORT_PHY_ERR_LOG:
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/* FIXME: could implement this with additional
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* libsas callbacks providing the HW supports it */
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break;
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case SMP_REPORT_PHY_SATA:
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req->resid_len -= 16;
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if ((int)req->resid_len < 0) {
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req->resid_len = 0;
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error = -EINVAL;
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goto out;
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}
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rsp->resid_len -= 60;
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sas_report_phy_sata(sas_ha, resp_data, req_data[9]);
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break;
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case SMP_REPORT_ROUTE_INFO:
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/* Can't implement; hosts have no routes */
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break;
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case SMP_WRITE_GPIO_REG: {
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/* SFF-8485 v0.7 */
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const int base_frame_size = 11;
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int to_write = req_data[4];
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if (blk_rq_bytes(req) < base_frame_size + to_write * 4 ||
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req->resid_len < base_frame_size + to_write * 4) {
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resp_data[2] = SMP_RESP_INV_FRM_LEN;
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break;
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}
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to_write = sas_host_smp_write_gpio(sas_ha, resp_data, req_data[2],
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req_data[3], to_write, &req_data[8]);
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req->resid_len -= base_frame_size + to_write * 4;
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rsp->resid_len -= 8;
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break;
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}
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case SMP_CONF_ROUTE_INFO:
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/* Can't implement; hosts have no routes */
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break;
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case SMP_PHY_CONTROL:
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req->resid_len -= 44;
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if ((int)req->resid_len < 0) {
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req->resid_len = 0;
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error = -EINVAL;
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goto out;
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}
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rsp->resid_len -= 8;
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sas_phy_control(sas_ha, req_data[9], req_data[10],
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req_data[32] >> 4, req_data[33] >> 4,
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resp_data);
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break;
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case SMP_PHY_TEST_FUNCTION:
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/* FIXME: should this be implemented? */
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break;
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default:
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/* probably a 2.0 function */
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break;
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}
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local_irq_disable();
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buf = kmap_atomic(bio_page(rsp->bio), KM_USER0) + bio_offset(rsp->bio);
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memcpy(buf, resp_data, blk_rq_bytes(rsp));
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flush_kernel_dcache_page(bio_page(rsp->bio));
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kunmap_atomic(buf - bio_offset(rsp->bio), KM_USER0);
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local_irq_enable();
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out:
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kfree(req_data);
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kfree(resp_data);
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return error;
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}
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