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0624517d80
forbid asm/bitops.h direct inclusion Because of compile errors that may occur after bit changes if asm/bitops.h is included directly without e.g. linux/kernel.h which includes linux/bitops.h, forbid direct inclusion of asm/bitops.h. Thanks to Adrian Bunk. Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Cc: Adrian Bunk <bunk@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
162 lines
5.8 KiB
C
162 lines
5.8 KiB
C
/*
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* include/asm-v850/bitops.h -- Bit operations
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*
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* Copyright (C) 2001,02,03,04,05 NEC Electronics Corporation
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* Copyright (C) 2001,02,03,04,05 Miles Bader <miles@gnu.org>
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* Copyright (C) 1992 Linus Torvalds.
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*/
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#ifndef __V850_BITOPS_H__
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#define __V850_BITOPS_H__
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#ifndef _LINUX_BITOPS_H
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#error only <linux/bitops.h> can be included directly
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#endif
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#include <linux/compiler.h> /* unlikely */
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#include <asm/byteorder.h> /* swab32 */
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#include <asm/system.h> /* interrupt enable/disable */
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#ifdef __KERNEL__
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#include <asm-generic/bitops/ffz.h>
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/*
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* The __ functions are not atomic
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*/
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/* In the following constant-bit-op macros, a "g" constraint is used when
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we really need an integer ("i" constraint). This is to avoid
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warnings/errors from the compiler in the case where the associated
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operand _isn't_ an integer, and shouldn't produce bogus assembly because
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use of that form is protected by a guard statement that checks for
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constants, and should otherwise be removed by the optimizer. This
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_usually_ works -- however, __builtin_constant_p returns true for a
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variable with a known constant value too, and unfortunately gcc will
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happily put the variable in a register and use the register for the "g"
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constraint'd asm operand. To avoid the latter problem, we add a
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constant offset to the operand and subtract it back in the asm code;
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forcing gcc to do arithmetic on the value is usually enough to get it
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to use a real constant value. This is horrible, and ultimately
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unreliable too, but it seems to work for now (hopefully gcc will offer
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us more control in the future, so we can do a better job). */
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#define __const_bit_op(op, nr, addr) \
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({ __asm__ (op " (%0 - 0x123), %1" \
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:: "g" (((nr) & 0x7) + 0x123), \
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"m" (*((char *)(addr) + ((nr) >> 3))) \
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: "memory"); })
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#define __var_bit_op(op, nr, addr) \
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({ int __nr = (nr); \
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__asm__ (op " %0, [%1]" \
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:: "r" (__nr & 0x7), \
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"r" ((char *)(addr) + (__nr >> 3)) \
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: "memory"); })
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#define __bit_op(op, nr, addr) \
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((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF) \
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? __const_bit_op (op, nr, addr) \
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: __var_bit_op (op, nr, addr))
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#define __set_bit(nr, addr) __bit_op ("set1", nr, addr)
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#define __clear_bit(nr, addr) __bit_op ("clr1", nr, addr)
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#define __change_bit(nr, addr) __bit_op ("not1", nr, addr)
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/* The bit instructions used by `non-atomic' variants are actually atomic. */
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#define set_bit __set_bit
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#define clear_bit __clear_bit
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#define change_bit __change_bit
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#define __const_tns_bit_op(op, nr, addr) \
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({ int __tns_res; \
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__asm__ __volatile__ ( \
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"tst1 (%1 - 0x123), %2; setf nz, %0; " op " (%1 - 0x123), %2" \
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: "=&r" (__tns_res) \
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: "g" (((nr) & 0x7) + 0x123), \
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"m" (*((char *)(addr) + ((nr) >> 3))) \
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: "memory"); \
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__tns_res; \
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})
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#define __var_tns_bit_op(op, nr, addr) \
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({ int __nr = (nr); \
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int __tns_res; \
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__asm__ __volatile__ ( \
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"tst1 %1, [%2]; setf nz, %0; " op " %1, [%2]" \
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: "=&r" (__tns_res) \
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: "r" (__nr & 0x7), \
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"r" ((char *)(addr) + (__nr >> 3)) \
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: "memory"); \
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__tns_res; \
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})
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#define __tns_bit_op(op, nr, addr) \
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((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF) \
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? __const_tns_bit_op (op, nr, addr) \
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: __var_tns_bit_op (op, nr, addr))
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#define __tns_atomic_bit_op(op, nr, addr) \
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({ int __tns_atomic_res, __tns_atomic_flags; \
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local_irq_save (__tns_atomic_flags); \
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__tns_atomic_res = __tns_bit_op (op, nr, addr); \
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local_irq_restore (__tns_atomic_flags); \
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__tns_atomic_res; \
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})
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#define __test_and_set_bit(nr, addr) __tns_bit_op ("set1", nr, addr)
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#define test_and_set_bit(nr, addr) __tns_atomic_bit_op ("set1", nr, addr)
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#define __test_and_clear_bit(nr, addr) __tns_bit_op ("clr1", nr, addr)
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#define test_and_clear_bit(nr, addr) __tns_atomic_bit_op ("clr1", nr, addr)
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#define __test_and_change_bit(nr, addr) __tns_bit_op ("not1", nr, addr)
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#define test_and_change_bit(nr, addr) __tns_atomic_bit_op ("not1", nr, addr)
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#define __const_test_bit(nr, addr) \
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({ int __test_bit_res; \
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__asm__ __volatile__ ("tst1 (%1 - 0x123), %2; setf nz, %0" \
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: "=r" (__test_bit_res) \
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: "g" (((nr) & 0x7) + 0x123), \
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"m" (*((const char *)(addr) + ((nr) >> 3)))); \
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__test_bit_res; \
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})
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static inline int __test_bit (int nr, const void *addr)
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{
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int res;
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__asm__ __volatile__ ("tst1 %1, [%2]; setf nz, %0"
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: "=r" (res)
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: "r" (nr & 0x7), "r" (addr + (nr >> 3)));
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return res;
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}
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#define test_bit(nr,addr) \
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((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF) \
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? __const_test_bit ((nr), (addr)) \
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: __test_bit ((nr), (addr)))
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/* clear_bit doesn't provide any barrier for the compiler. */
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#define smp_mb__before_clear_bit() barrier ()
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#define smp_mb__after_clear_bit() barrier ()
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#include <asm-generic/bitops/ffs.h>
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#include <asm-generic/bitops/fls.h>
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#include <asm-generic/bitops/fls64.h>
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#include <asm-generic/bitops/__ffs.h>
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#include <asm-generic/bitops/find.h>
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#include <asm-generic/bitops/sched.h>
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#include <asm-generic/bitops/hweight.h>
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#include <asm-generic/bitops/lock.h>
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#include <asm-generic/bitops/ext2-non-atomic.h>
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#define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a)
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#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a)
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#include <asm-generic/bitops/minix.h>
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#endif /* __KERNEL__ */
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#endif /* __V850_BITOPS_H__ */
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