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97921a5b03
* 'anholt/drm-intel-next' of /home/airlied/kernel/drm-next: (48 commits) agp/intel-gtt: kill previous_size assignments agp/intel-gtt: kill intel_i830_tlbflush agp/intel: split out gmch/gtt probe, part 1 agp/intel: kill mutli_gmch_chip agp/intel: uncoditionally reconfigure driver on resume agp/intel: split out the GTT support agp/intel: introduce intel-agp.h header file drm/i915: Don't touch PORT_HOTPLUG_EN in intel_dp_detect() drm/i915/pch: Use minimal number of FDI lanes (v2) drm/i915: Add the support of memory self-refresh on Ironlake drm/i915: Move Pineview CxSR and watermark code into update_wm hook. drm/i915: Only save/restore FBC on the platform that supports FBC drm/i915: Fix the incorrect argument for SDVO SET_TV_format command drm/i915: Add support of SDVO on Ibexpeak PCH drm/i915: Don't enable pipe/plane/VCO early (wait for DPMS on). drm/i915: do not read uninitialized ->dev_private Revert "drm/i915: Use a dmi quirk to skip a broken SDVO TV output." drm/i915: implement multifunction SDVO device support drm/i915: remove unused intel_pipe_get_connector() drm/i915: remove connector object in old output structure ...
467 lines
13 KiB
C
467 lines
13 KiB
C
/*
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* Copyright 2006 Dave Airlie <airlied@linux.ie>
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* Copyright © 2006-2007 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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*/
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#include "drmP.h"
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#include "drm.h"
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#include "drm_crtc.h"
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#include "intel_drv.h"
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#include "i915_drm.h"
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#include "i915_drv.h"
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#include "dvo.h"
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#define SIL164_ADDR 0x38
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#define CH7xxx_ADDR 0x76
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#define TFP410_ADDR 0x38
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static struct intel_dvo_device intel_dvo_devices[] = {
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{
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.type = INTEL_DVO_CHIP_TMDS,
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.name = "sil164",
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.dvo_reg = DVOC,
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.slave_addr = SIL164_ADDR,
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.dev_ops = &sil164_ops,
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},
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{
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.type = INTEL_DVO_CHIP_TMDS,
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.name = "ch7xxx",
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.dvo_reg = DVOC,
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.slave_addr = CH7xxx_ADDR,
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.dev_ops = &ch7xxx_ops,
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},
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{
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.type = INTEL_DVO_CHIP_LVDS,
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.name = "ivch",
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.dvo_reg = DVOA,
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.slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
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.dev_ops = &ivch_ops,
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},
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{
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.type = INTEL_DVO_CHIP_TMDS,
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.name = "tfp410",
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.dvo_reg = DVOC,
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.slave_addr = TFP410_ADDR,
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.dev_ops = &tfp410_ops,
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},
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{
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.type = INTEL_DVO_CHIP_LVDS,
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.name = "ch7017",
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.dvo_reg = DVOC,
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.slave_addr = 0x75,
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.gpio = GPIOE,
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.dev_ops = &ch7017_ops,
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}
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};
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static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
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{
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struct drm_i915_private *dev_priv = encoder->dev->dev_private;
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struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
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struct intel_dvo_device *dvo = intel_encoder->dev_priv;
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u32 dvo_reg = dvo->dvo_reg;
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u32 temp = I915_READ(dvo_reg);
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if (mode == DRM_MODE_DPMS_ON) {
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I915_WRITE(dvo_reg, temp | DVO_ENABLE);
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I915_READ(dvo_reg);
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dvo->dev_ops->dpms(dvo, mode);
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} else {
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dvo->dev_ops->dpms(dvo, mode);
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I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
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I915_READ(dvo_reg);
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}
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}
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static int intel_dvo_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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struct drm_encoder *encoder = intel_attached_encoder(connector);
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struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
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struct intel_dvo_device *dvo = intel_encoder->dev_priv;
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if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
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return MODE_NO_DBLESCAN;
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/* XXX: Validate clock range */
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if (dvo->panel_fixed_mode) {
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if (mode->hdisplay > dvo->panel_fixed_mode->hdisplay)
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return MODE_PANEL;
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if (mode->vdisplay > dvo->panel_fixed_mode->vdisplay)
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return MODE_PANEL;
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}
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return dvo->dev_ops->mode_valid(dvo, mode);
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}
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static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
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struct intel_dvo_device *dvo = intel_encoder->dev_priv;
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/* If we have timings from the BIOS for the panel, put them in
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* to the adjusted mode. The CRTC will be set up for this mode,
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* with the panel scaling set up to source from the H/VDisplay
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* of the original mode.
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*/
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if (dvo->panel_fixed_mode != NULL) {
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#define C(x) adjusted_mode->x = dvo->panel_fixed_mode->x
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C(hdisplay);
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C(hsync_start);
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C(hsync_end);
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C(htotal);
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C(vdisplay);
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C(vsync_start);
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C(vsync_end);
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C(vtotal);
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C(clock);
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drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
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#undef C
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}
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if (dvo->dev_ops->mode_fixup)
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return dvo->dev_ops->mode_fixup(dvo, mode, adjusted_mode);
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return true;
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}
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static void intel_dvo_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct drm_device *dev = encoder->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
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struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
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struct intel_dvo_device *dvo = intel_encoder->dev_priv;
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int pipe = intel_crtc->pipe;
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u32 dvo_val;
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u32 dvo_reg = dvo->dvo_reg, dvo_srcdim_reg;
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int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
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switch (dvo_reg) {
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case DVOA:
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default:
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dvo_srcdim_reg = DVOA_SRCDIM;
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break;
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case DVOB:
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dvo_srcdim_reg = DVOB_SRCDIM;
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break;
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case DVOC:
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dvo_srcdim_reg = DVOC_SRCDIM;
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break;
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}
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dvo->dev_ops->mode_set(dvo, mode, adjusted_mode);
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/* Save the data order, since I don't know what it should be set to. */
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dvo_val = I915_READ(dvo_reg) &
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(DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
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dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
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DVO_BLANK_ACTIVE_HIGH;
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if (pipe == 1)
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dvo_val |= DVO_PIPE_B_SELECT;
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dvo_val |= DVO_PIPE_STALL;
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if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
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dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
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if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
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dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
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I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);
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/*I915_WRITE(DVOB_SRCDIM,
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(adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
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(adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
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I915_WRITE(dvo_srcdim_reg,
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(adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
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(adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
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/*I915_WRITE(DVOB, dvo_val);*/
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I915_WRITE(dvo_reg, dvo_val);
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}
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/**
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* Detect the output connection on our DVO device.
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*
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* Unimplemented.
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*/
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static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector)
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{
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struct drm_encoder *encoder = intel_attached_encoder(connector);
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struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
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struct intel_dvo_device *dvo = intel_encoder->dev_priv;
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return dvo->dev_ops->detect(dvo);
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}
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static int intel_dvo_get_modes(struct drm_connector *connector)
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{
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struct drm_encoder *encoder = intel_attached_encoder(connector);
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struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
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struct intel_dvo_device *dvo = intel_encoder->dev_priv;
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/* We should probably have an i2c driver get_modes function for those
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* devices which will have a fixed set of modes determined by the chip
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* (TV-out, for example), but for now with just TMDS and LVDS,
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* that's not the case.
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*/
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intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
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if (!list_empty(&connector->probed_modes))
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return 1;
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if (dvo->panel_fixed_mode != NULL) {
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struct drm_display_mode *mode;
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mode = drm_mode_duplicate(connector->dev, dvo->panel_fixed_mode);
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if (mode) {
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drm_mode_probed_add(connector, mode);
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return 1;
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}
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}
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return 0;
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}
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static void intel_dvo_destroy (struct drm_connector *connector)
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{
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drm_sysfs_connector_remove(connector);
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drm_connector_cleanup(connector);
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kfree(connector);
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}
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static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
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.dpms = intel_dvo_dpms,
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.mode_fixup = intel_dvo_mode_fixup,
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.prepare = intel_encoder_prepare,
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.mode_set = intel_dvo_mode_set,
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.commit = intel_encoder_commit,
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};
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static const struct drm_connector_funcs intel_dvo_connector_funcs = {
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.dpms = drm_helper_connector_dpms,
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.detect = intel_dvo_detect,
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.destroy = intel_dvo_destroy,
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.fill_modes = drm_helper_probe_single_connector_modes,
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};
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static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
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.mode_valid = intel_dvo_mode_valid,
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.get_modes = intel_dvo_get_modes,
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.best_encoder = intel_attached_encoder,
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};
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static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
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{
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struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
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struct intel_dvo_device *dvo = intel_encoder->dev_priv;
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if (dvo) {
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if (dvo->dev_ops->destroy)
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dvo->dev_ops->destroy(dvo);
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if (dvo->panel_fixed_mode)
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kfree(dvo->panel_fixed_mode);
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}
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if (intel_encoder->i2c_bus)
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intel_i2c_destroy(intel_encoder->i2c_bus);
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if (intel_encoder->ddc_bus)
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intel_i2c_destroy(intel_encoder->ddc_bus);
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drm_encoder_cleanup(encoder);
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kfree(intel_encoder);
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}
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static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
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.destroy = intel_dvo_enc_destroy,
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};
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/**
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* Attempts to get a fixed panel timing for LVDS (currently only the i830).
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*
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* Other chips with DVO LVDS will need to extend this to deal with the LVDS
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* chip being on DVOB/C and having multiple pipes.
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*/
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static struct drm_display_mode *
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intel_dvo_get_current_mode (struct drm_connector *connector)
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{
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struct drm_device *dev = connector->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_encoder *encoder = intel_attached_encoder(connector);
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struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
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struct intel_dvo_device *dvo = intel_encoder->dev_priv;
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uint32_t dvo_reg = dvo->dvo_reg;
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uint32_t dvo_val = I915_READ(dvo_reg);
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struct drm_display_mode *mode = NULL;
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/* If the DVO port is active, that'll be the LVDS, so we can pull out
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* its timings to get how the BIOS set up the panel.
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*/
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if (dvo_val & DVO_ENABLE) {
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struct drm_crtc *crtc;
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int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
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crtc = intel_get_crtc_from_pipe(dev, pipe);
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if (crtc) {
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mode = intel_crtc_mode_get(dev, crtc);
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if (mode) {
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mode->type |= DRM_MODE_TYPE_PREFERRED;
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if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
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mode->flags |= DRM_MODE_FLAG_PHSYNC;
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if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
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mode->flags |= DRM_MODE_FLAG_PVSYNC;
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}
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}
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}
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return mode;
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}
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void intel_dvo_init(struct drm_device *dev)
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{
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struct intel_encoder *intel_encoder;
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struct intel_connector *intel_connector;
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struct intel_dvo_device *dvo;
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struct i2c_adapter *i2cbus = NULL;
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int ret = 0;
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int i;
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int encoder_type = DRM_MODE_ENCODER_NONE;
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intel_encoder = kzalloc (sizeof(struct intel_encoder), GFP_KERNEL);
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if (!intel_encoder)
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return;
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intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
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if (!intel_connector) {
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kfree(intel_encoder);
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return;
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}
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/* Set up the DDC bus */
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intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "DVODDC_D");
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if (!intel_encoder->ddc_bus)
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goto free_intel;
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/* Now, try to find a controller */
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for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
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struct drm_connector *connector = &intel_connector->base;
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int gpio;
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dvo = &intel_dvo_devices[i];
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/* Allow the I2C driver info to specify the GPIO to be used in
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* special cases, but otherwise default to what's defined
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* in the spec.
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*/
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if (dvo->gpio != 0)
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gpio = dvo->gpio;
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else if (dvo->type == INTEL_DVO_CHIP_LVDS)
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gpio = GPIOB;
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else
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gpio = GPIOE;
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/* Set up the I2C bus necessary for the chip we're probing.
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* It appears that everything is on GPIOE except for panels
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* on i830 laptops, which are on GPIOB (DVOA).
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*/
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if (i2cbus != NULL)
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intel_i2c_destroy(i2cbus);
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if (!(i2cbus = intel_i2c_create(dev, gpio,
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gpio == GPIOB ? "DVOI2C_B" : "DVOI2C_E"))) {
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continue;
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}
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if (dvo->dev_ops!= NULL)
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ret = dvo->dev_ops->init(dvo, i2cbus);
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else
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ret = false;
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if (!ret)
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continue;
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intel_encoder->type = INTEL_OUTPUT_DVO;
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intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
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switch (dvo->type) {
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case INTEL_DVO_CHIP_TMDS:
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intel_encoder->clone_mask =
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(1 << INTEL_DVO_TMDS_CLONE_BIT) |
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(1 << INTEL_ANALOG_CLONE_BIT);
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drm_connector_init(dev, connector,
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&intel_dvo_connector_funcs,
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DRM_MODE_CONNECTOR_DVII);
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encoder_type = DRM_MODE_ENCODER_TMDS;
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break;
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case INTEL_DVO_CHIP_LVDS:
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intel_encoder->clone_mask =
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(1 << INTEL_DVO_LVDS_CLONE_BIT);
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drm_connector_init(dev, connector,
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&intel_dvo_connector_funcs,
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DRM_MODE_CONNECTOR_LVDS);
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encoder_type = DRM_MODE_ENCODER_LVDS;
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break;
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}
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drm_connector_helper_add(connector,
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&intel_dvo_connector_helper_funcs);
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connector->display_info.subpixel_order = SubPixelHorizontalRGB;
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connector->interlace_allowed = false;
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connector->doublescan_allowed = false;
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intel_encoder->dev_priv = dvo;
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intel_encoder->i2c_bus = i2cbus;
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drm_encoder_init(dev, &intel_encoder->enc,
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&intel_dvo_enc_funcs, encoder_type);
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drm_encoder_helper_add(&intel_encoder->enc,
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&intel_dvo_helper_funcs);
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drm_mode_connector_attach_encoder(&intel_connector->base,
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&intel_encoder->enc);
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if (dvo->type == INTEL_DVO_CHIP_LVDS) {
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/* For our LVDS chipsets, we should hopefully be able
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* to dig the fixed panel mode out of the BIOS data.
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* However, it's in a different format from the BIOS
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* data on chipsets with integrated LVDS (stored in AIM
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|
* headers, likely), so for now, just get the current
|
|
* mode being output through DVO.
|
|
*/
|
|
dvo->panel_fixed_mode =
|
|
intel_dvo_get_current_mode(connector);
|
|
dvo->panel_wants_dither = true;
|
|
}
|
|
|
|
drm_sysfs_connector_add(connector);
|
|
return;
|
|
}
|
|
|
|
intel_i2c_destroy(intel_encoder->ddc_bus);
|
|
/* Didn't find a chip, so tear down. */
|
|
if (i2cbus != NULL)
|
|
intel_i2c_destroy(i2cbus);
|
|
free_intel:
|
|
kfree(intel_encoder);
|
|
kfree(intel_connector);
|
|
}
|