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d17468c6f1
* A fix for detecting ".option arch" support on not-yet-released LLVM builds. * A fix for a missing TLB flush when modifying non-leaf PTEs. * A handufl of fixes for T-Head custom extensions. * A fix for systems with the legacy PMU, that manifests as a crash on kernels built without SBI PMU support. * A fix for systems that clear *envcfg on suspend, which manifests as cbo.zero trapping after resume. * A pair of fixes for Svnapot systems, including removing Svnapot support for huge vmalloc/vmap regions. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmXh8A0THHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYif7tD/9mlPpK/OZs9U8DXVpZU91iEekVU7ss CWY+Y9+fx9hjOahqUgJ72aG6mj5p9DW9cqz+73Ktds4xGCrh3Sr734nAFTshpo2K IiKx+Ruq6YIURzXMcNuQ4JHAOMI4P4p34cha+fZ5ORPXRKLJQqBR3eNFBa5NHuR4 md6TaU0gJAZE3yY2llLJOPlj9cT8swPV4gc8I0pUb4gKYj3sU/2HWVEYfiBoDnjo XUSNV2ts9mWv7OGgBqS1QqdZeFKizPp87PRfzNBye5Gx8mpUXS52Z+W7vr6f/EUf stWhDnR2XQ2HYSPoo5rQqIfZHH9dp+DUtqGjNo+jX54OoFAvHHtlhrEVC4q3uGkY Y3RoIe17s1EvozMKXCVQ+tCrhOh/jttye5Om5gb8yJ2clATL5dJM/jkoMKMdIh5n KLhZBYLrgN/Z0Mb0wePnlXhVnW2/N4ruIlP5Kd+wHRR+rUlQm6Xjccg4r5MgxMgK iaVbBZ/JTkJhP/II5ACr519Mz5Nh2N1QKTQkbHA5XWrn9+SDnF9Dio/EurPshvmm xJYcG42sxkI4V9UEmriyiAs6NqIDTKyNoA28WXYLVDCrFomtehmttS9RWE7FqPku mAUIUd3hbP4Qrt81Gus+CwCIZSuVhJin+3VUAI6Z6FpImDoamquJvIQ3aYtZ/nye pDSC3QhivYUA6A== =FpVN -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.8-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Palmer Dabbelt: - detect ".option arch" support on not-yet-released LLVM builds - fix missing TLB flush when modifying non-leaf PTEs - fixes for T-Head custom extensions - fix for systems with the legacy PMU, that manifests as a crash on kernels built without SBI PMU support - fix for systems that clear *envcfg on suspend, which manifests as cbo.zero trapping after resume - fixes for Svnapot systems, including removing Svnapot support for huge vmalloc/vmap regions * tag 'riscv-for-linus-6.8-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Sparse-Memory/vmemmap out-of-bounds fix riscv: Fix pte_leaf_size() for NAPOT Revert "riscv: mm: support Svnapot in huge vmap" riscv: Save/restore envcfg CSR during CPU suspend riscv: Add a custom ISA extension for the [ms]envcfg CSR riscv: Fix enabling cbo.zero when running in M-mode perf: RISCV: Fix panic on pmu overflow handler MAINTAINERS: Update SiFive driver maintainers drivers: perf: ctr_get_width function for legacy is not defined drivers: perf: added capabilities for legacy PMU RISC-V: Ignore V from the riscv,isa DT property on older T-Head CPUs riscv: Fix build error if !CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION riscv: mm: fix NOCACHE_THEAD does not set bit[61] correctly riscv: add CALLER_ADDRx support RISC-V: Drop invalid test from CONFIG_AS_HAS_OPTION_ARCH kbuild: Add -Wa,--fatal-warnings to as-instr invocation riscv: tlb: fix __p*d_free_tlb() |
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.. | ||
amlogic | ||
arm_cspmu | ||
hisilicon | ||
alibaba_uncore_drw_pmu.c | ||
apple_m1_cpu_pmu.c | ||
arm_dmc620_pmu.c | ||
arm_dsu_pmu.c | ||
arm_pmu_acpi.c | ||
arm_pmu_platform.c | ||
arm_pmu.c | ||
arm_pmuv3.c | ||
arm_smmuv3_pmu.c | ||
arm_spe_pmu.c | ||
arm-cci.c | ||
arm-ccn.c | ||
arm-cmn.c | ||
cxl_pmu.c | ||
dwc_pcie_pmu.c | ||
fsl_imx8_ddr_perf.c | ||
fsl_imx9_ddr_perf.c | ||
Kconfig | ||
Makefile | ||
marvell_cn10k_ddr_pmu.c | ||
marvell_cn10k_tad_pmu.c | ||
qcom_l2_pmu.c | ||
qcom_l3_pmu.c | ||
riscv_pmu_legacy.c | ||
riscv_pmu_sbi.c | ||
riscv_pmu.c | ||
thunderx2_pmu.c | ||
xgene_pmu.c |