mirror of
https://github.com/torvalds/linux.git
synced 2024-12-04 18:13:04 +00:00
b270491eb9
PLLD is the only parent for DSIA & DSIB on Tegra124 and Tegra132. Besides, BIT 30 in PLLD_MISC register controls the output of DSI clock. So this patch removes "dsia_mux" & "dsib_mux", and create a new clock "plld_dsi" to represent the DSI clock enable control. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Mark Zhang <markz@nvidia.com> |
||
---|---|---|
.. | ||
clk-audio-sync.c | ||
clk-divider.c | ||
clk-id.h | ||
clk-periph-gate.c | ||
clk-periph.c | ||
clk-pll-out.c | ||
clk-pll.c | ||
clk-super.c | ||
clk-tegra20.c | ||
clk-tegra30.c | ||
clk-tegra114.c | ||
clk-tegra124.c | ||
clk-tegra-audio.c | ||
clk-tegra-fixed.c | ||
clk-tegra-periph.c | ||
clk-tegra-pmc.c | ||
clk-tegra-super-gen4.c | ||
clk.c | ||
clk.h | ||
Makefile |