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6305166c87
Add ACPI support in the fsl-mc driver. Driver parses MC DSDT table to extract memory and other resources. Interrupt (GIC ITS) information is extracted from the MADT table by drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c. IORT table is parsed to configure DMA. Signed-off-by: Makarand Pawagi <makarand.pawagi@nxp.com> Signed-off-by: Diana Craciun <diana.craciun@oss.nxp.com> Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Link: https://lore.kernel.org/r/20200619082013.13661-13-lorenzo.pieralisi@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
302 lines
7.1 KiB
C
302 lines
7.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Freescale Management Complex (MC) bus driver MSI support
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*
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* Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
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* Author: German Rivera <German.Rivera@freescale.com>
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*
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*/
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#include <linux/of_device.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/msi.h>
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#include <linux/acpi_iort.h>
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#include "fsl-mc-private.h"
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#ifdef GENERIC_MSI_DOMAIN_OPS
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/*
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* Generate a unique ID identifying the interrupt (only used within the MSI
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* irqdomain. Combine the icid with the interrupt index.
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*/
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static irq_hw_number_t fsl_mc_domain_calc_hwirq(struct fsl_mc_device *dev,
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struct msi_desc *desc)
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{
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/*
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* Make the base hwirq value for ICID*10000 so it is readable
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* as a decimal value in /proc/interrupts.
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*/
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return (irq_hw_number_t)(desc->fsl_mc.msi_index + (dev->icid * 10000));
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}
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static void fsl_mc_msi_set_desc(msi_alloc_info_t *arg,
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struct msi_desc *desc)
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{
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arg->desc = desc;
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arg->hwirq = fsl_mc_domain_calc_hwirq(to_fsl_mc_device(desc->dev),
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desc);
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}
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#else
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#define fsl_mc_msi_set_desc NULL
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#endif
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static void fsl_mc_msi_update_dom_ops(struct msi_domain_info *info)
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{
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struct msi_domain_ops *ops = info->ops;
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if (!ops)
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return;
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/*
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* set_desc should not be set by the caller
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*/
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if (!ops->set_desc)
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ops->set_desc = fsl_mc_msi_set_desc;
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}
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static void __fsl_mc_msi_write_msg(struct fsl_mc_device *mc_bus_dev,
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struct fsl_mc_device_irq *mc_dev_irq)
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{
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int error;
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struct fsl_mc_device *owner_mc_dev = mc_dev_irq->mc_dev;
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struct msi_desc *msi_desc = mc_dev_irq->msi_desc;
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struct dprc_irq_cfg irq_cfg;
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/*
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* msi_desc->msg.address is 0x0 when this function is invoked in
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* the free_irq() code path. In this case, for the MC, we don't
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* really need to "unprogram" the MSI, so we just return.
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*/
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if (msi_desc->msg.address_lo == 0x0 && msi_desc->msg.address_hi == 0x0)
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return;
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if (!owner_mc_dev)
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return;
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irq_cfg.paddr = ((u64)msi_desc->msg.address_hi << 32) |
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msi_desc->msg.address_lo;
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irq_cfg.val = msi_desc->msg.data;
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irq_cfg.irq_num = msi_desc->irq;
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if (owner_mc_dev == mc_bus_dev) {
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/*
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* IRQ is for the mc_bus_dev's DPRC itself
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*/
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error = dprc_set_irq(mc_bus_dev->mc_io,
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MC_CMD_FLAG_INTR_DIS | MC_CMD_FLAG_PRI,
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mc_bus_dev->mc_handle,
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mc_dev_irq->dev_irq_index,
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&irq_cfg);
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if (error < 0) {
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dev_err(&owner_mc_dev->dev,
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"dprc_set_irq() failed: %d\n", error);
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}
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} else {
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/*
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* IRQ is for for a child device of mc_bus_dev
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*/
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error = dprc_set_obj_irq(mc_bus_dev->mc_io,
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MC_CMD_FLAG_INTR_DIS | MC_CMD_FLAG_PRI,
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mc_bus_dev->mc_handle,
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owner_mc_dev->obj_desc.type,
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owner_mc_dev->obj_desc.id,
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mc_dev_irq->dev_irq_index,
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&irq_cfg);
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if (error < 0) {
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dev_err(&owner_mc_dev->dev,
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"dprc_obj_set_irq() failed: %d\n", error);
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}
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}
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}
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/*
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* NOTE: This function is invoked with interrupts disabled
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*/
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static void fsl_mc_msi_write_msg(struct irq_data *irq_data,
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struct msi_msg *msg)
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{
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struct msi_desc *msi_desc = irq_data_get_msi_desc(irq_data);
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struct fsl_mc_device *mc_bus_dev = to_fsl_mc_device(msi_desc->dev);
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struct fsl_mc_bus *mc_bus = to_fsl_mc_bus(mc_bus_dev);
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struct fsl_mc_device_irq *mc_dev_irq =
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&mc_bus->irq_resources[msi_desc->fsl_mc.msi_index];
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msi_desc->msg = *msg;
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/*
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* Program the MSI (paddr, value) pair in the device:
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*/
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__fsl_mc_msi_write_msg(mc_bus_dev, mc_dev_irq);
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}
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static void fsl_mc_msi_update_chip_ops(struct msi_domain_info *info)
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{
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struct irq_chip *chip = info->chip;
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if (!chip)
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return;
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/*
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* irq_write_msi_msg should not be set by the caller
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*/
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if (!chip->irq_write_msi_msg)
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chip->irq_write_msi_msg = fsl_mc_msi_write_msg;
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}
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/**
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* fsl_mc_msi_create_irq_domain - Create a fsl-mc MSI interrupt domain
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* @np: Optional device-tree node of the interrupt controller
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* @info: MSI domain info
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* @parent: Parent irq domain
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*
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* Updates the domain and chip ops and creates a fsl-mc MSI
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* interrupt domain.
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*
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* Returns:
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* A domain pointer or NULL in case of failure.
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*/
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struct irq_domain *fsl_mc_msi_create_irq_domain(struct fwnode_handle *fwnode,
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struct msi_domain_info *info,
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struct irq_domain *parent)
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{
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struct irq_domain *domain;
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if (WARN_ON((info->flags & MSI_FLAG_LEVEL_CAPABLE)))
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info->flags &= ~MSI_FLAG_LEVEL_CAPABLE;
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if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
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fsl_mc_msi_update_dom_ops(info);
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if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
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fsl_mc_msi_update_chip_ops(info);
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domain = msi_create_irq_domain(fwnode, info, parent);
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if (domain)
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irq_domain_update_bus_token(domain, DOMAIN_BUS_FSL_MC_MSI);
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return domain;
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}
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struct irq_domain *fsl_mc_find_msi_domain(struct device *dev)
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{
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struct device *root_dprc_dev;
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struct device *bus_dev;
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struct irq_domain *msi_domain;
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struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
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fsl_mc_get_root_dprc(dev, &root_dprc_dev);
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bus_dev = root_dprc_dev->parent;
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if (bus_dev->of_node) {
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msi_domain = of_msi_map_get_device_domain(dev,
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mc_dev->icid,
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DOMAIN_BUS_FSL_MC_MSI);
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/*
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* if the msi-map property is missing assume that all the
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* child containers inherit the domain from the parent
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*/
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if (!msi_domain)
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msi_domain = of_msi_get_domain(bus_dev,
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bus_dev->of_node,
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DOMAIN_BUS_FSL_MC_MSI);
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} else {
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msi_domain = iort_get_device_domain(dev, mc_dev->icid,
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DOMAIN_BUS_FSL_MC_MSI);
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}
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return msi_domain;
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}
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static void fsl_mc_msi_free_descs(struct device *dev)
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{
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struct msi_desc *desc, *tmp;
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list_for_each_entry_safe(desc, tmp, dev_to_msi_list(dev), list) {
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list_del(&desc->list);
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free_msi_entry(desc);
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}
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}
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static int fsl_mc_msi_alloc_descs(struct device *dev, unsigned int irq_count)
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{
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unsigned int i;
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int error;
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struct msi_desc *msi_desc;
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for (i = 0; i < irq_count; i++) {
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msi_desc = alloc_msi_entry(dev, 1, NULL);
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if (!msi_desc) {
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dev_err(dev, "Failed to allocate msi entry\n");
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error = -ENOMEM;
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goto cleanup_msi_descs;
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}
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msi_desc->fsl_mc.msi_index = i;
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INIT_LIST_HEAD(&msi_desc->list);
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list_add_tail(&msi_desc->list, dev_to_msi_list(dev));
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}
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return 0;
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cleanup_msi_descs:
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fsl_mc_msi_free_descs(dev);
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return error;
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}
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int fsl_mc_msi_domain_alloc_irqs(struct device *dev,
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unsigned int irq_count)
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{
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struct irq_domain *msi_domain;
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int error;
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if (!list_empty(dev_to_msi_list(dev)))
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return -EINVAL;
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error = fsl_mc_msi_alloc_descs(dev, irq_count);
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if (error < 0)
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return error;
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msi_domain = dev_get_msi_domain(dev);
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if (!msi_domain) {
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error = -EINVAL;
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goto cleanup_msi_descs;
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}
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/*
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* NOTE: Calling this function will trigger the invocation of the
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* its_fsl_mc_msi_prepare() callback
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*/
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error = msi_domain_alloc_irqs(msi_domain, dev, irq_count);
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if (error) {
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dev_err(dev, "Failed to allocate IRQs\n");
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goto cleanup_msi_descs;
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}
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return 0;
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cleanup_msi_descs:
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fsl_mc_msi_free_descs(dev);
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return error;
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}
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void fsl_mc_msi_domain_free_irqs(struct device *dev)
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{
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struct irq_domain *msi_domain;
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msi_domain = dev_get_msi_domain(dev);
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if (!msi_domain)
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return;
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msi_domain_free_irqs(msi_domain, dev);
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if (list_empty(dev_to_msi_list(dev)))
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return;
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fsl_mc_msi_free_descs(dev);
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}
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