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47b82e8818
The interrupts are enabled/disabled so the interrupt handler can run with enabled interrupts while serving the interrupt and not lose other interrupts especially the timer tick. If the system runs with force-threaded interrupts then there is no need to enable the interrupts. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: David S. Miller <davem@davemloft.net>
537 lines
14 KiB
C
537 lines
14 KiB
C
/*
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* Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org>
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* Copyright (C) 2003 Red Hat
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*
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kernel.h>
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#include <linux/timer.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/major.h>
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#include <linux/errno.h>
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#include <linux/genhd.h>
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#include <linux/blkpg.h>
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#include <linux/slab.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/ide.h>
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#include <linux/bitops.h>
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#include <linux/nmi.h>
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#include <asm/byteorder.h>
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#include <asm/irq.h>
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#include <linux/uaccess.h>
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#include <asm/io.h>
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void SELECT_MASK(ide_drive_t *drive, int mask)
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{
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const struct ide_port_ops *port_ops = drive->hwif->port_ops;
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if (port_ops && port_ops->maskproc)
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port_ops->maskproc(drive, mask);
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}
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u8 ide_read_error(ide_drive_t *drive)
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{
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struct ide_taskfile tf;
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drive->hwif->tp_ops->tf_read(drive, &tf, IDE_VALID_ERROR);
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return tf.error;
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}
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EXPORT_SYMBOL_GPL(ide_read_error);
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void ide_fix_driveid(u16 *id)
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{
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#ifndef __LITTLE_ENDIAN
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# ifdef __BIG_ENDIAN
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int i;
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for (i = 0; i < 256; i++)
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id[i] = __le16_to_cpu(id[i]);
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# else
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# error "Please fix <asm/byteorder.h>"
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# endif
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#endif
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}
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/*
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* ide_fixstring() cleans up and (optionally) byte-swaps a text string,
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* removing leading/trailing blanks and compressing internal blanks.
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* It is primarily used to tidy up the model name/number fields as
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* returned by the ATA_CMD_ID_ATA[PI] commands.
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*/
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void ide_fixstring(u8 *s, const int bytecount, const int byteswap)
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{
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u8 *p, *end = &s[bytecount & ~1]; /* bytecount must be even */
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if (byteswap) {
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/* convert from big-endian to host byte order */
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for (p = s ; p != end ; p += 2)
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be16_to_cpus((u16 *) p);
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}
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/* strip leading blanks */
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p = s;
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while (s != end && *s == ' ')
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++s;
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/* compress internal blanks and strip trailing blanks */
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while (s != end && *s) {
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if (*s++ != ' ' || (s != end && *s && *s != ' '))
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*p++ = *(s-1);
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}
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/* wipe out trailing garbage */
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while (p != end)
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*p++ = '\0';
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}
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EXPORT_SYMBOL(ide_fixstring);
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/*
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* This routine busy-waits for the drive status to be not "busy".
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* It then checks the status for all of the "good" bits and none
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* of the "bad" bits, and if all is okay it returns 0. All other
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* cases return error -- caller may then invoke ide_error().
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*
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* This routine should get fixed to not hog the cpu during extra long waits..
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* That could be done by busy-waiting for the first jiffy or two, and then
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* setting a timer to wake up at half second intervals thereafter,
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* until timeout is achieved, before timing out.
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*/
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int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad,
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unsigned long timeout, u8 *rstat)
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{
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ide_hwif_t *hwif = drive->hwif;
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const struct ide_tp_ops *tp_ops = hwif->tp_ops;
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unsigned long flags;
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bool irqs_threaded = force_irqthreads;
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int i;
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u8 stat;
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udelay(1); /* spec allows drive 400ns to assert "BUSY" */
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stat = tp_ops->read_status(hwif);
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if (stat & ATA_BUSY) {
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if (!irqs_threaded) {
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local_save_flags(flags);
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local_irq_enable_in_hardirq();
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}
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timeout += jiffies;
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while ((stat = tp_ops->read_status(hwif)) & ATA_BUSY) {
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if (time_after(jiffies, timeout)) {
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/*
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* One last read after the timeout in case
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* heavy interrupt load made us not make any
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* progress during the timeout..
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*/
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stat = tp_ops->read_status(hwif);
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if ((stat & ATA_BUSY) == 0)
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break;
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if (!irqs_threaded)
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local_irq_restore(flags);
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*rstat = stat;
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return -EBUSY;
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}
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}
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if (!irqs_threaded)
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local_irq_restore(flags);
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}
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/*
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* Allow status to settle, then read it again.
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* A few rare drives vastly violate the 400ns spec here,
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* so we'll wait up to 10usec for a "good" status
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* rather than expensively fail things immediately.
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* This fix courtesy of Matthew Faupel & Niccolo Rigacci.
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*/
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for (i = 0; i < 10; i++) {
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udelay(1);
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stat = tp_ops->read_status(hwif);
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if (OK_STAT(stat, good, bad)) {
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*rstat = stat;
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return 0;
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}
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}
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*rstat = stat;
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return -EFAULT;
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}
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/*
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* In case of error returns error value after doing "*startstop = ide_error()".
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* The caller should return the updated value of "startstop" in this case,
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* "startstop" is unchanged when the function returns 0.
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*/
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int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good,
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u8 bad, unsigned long timeout)
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{
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int err;
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u8 stat;
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/* bail early if we've exceeded max_failures */
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if (drive->max_failures && (drive->failures > drive->max_failures)) {
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*startstop = ide_stopped;
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return 1;
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}
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err = __ide_wait_stat(drive, good, bad, timeout, &stat);
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if (err) {
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char *s = (err == -EBUSY) ? "status timeout" : "status error";
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*startstop = ide_error(drive, s, stat);
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}
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return err;
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}
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EXPORT_SYMBOL(ide_wait_stat);
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/**
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* ide_in_drive_list - look for drive in black/white list
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* @id: drive identifier
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* @table: list to inspect
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*
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* Look for a drive in the blacklist and the whitelist tables
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* Returns 1 if the drive is found in the table.
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*/
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int ide_in_drive_list(u16 *id, const struct drive_list_entry *table)
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{
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for ( ; table->id_model; table++)
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if ((!strcmp(table->id_model, (char *)&id[ATA_ID_PROD])) &&
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(!table->id_firmware ||
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strstr((char *)&id[ATA_ID_FW_REV], table->id_firmware)))
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return 1;
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return 0;
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}
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EXPORT_SYMBOL_GPL(ide_in_drive_list);
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/*
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* Early UDMA66 devices don't set bit14 to 1, only bit13 is valid.
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* Some optical devices with the buggy firmwares have the same problem.
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*/
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static const struct drive_list_entry ivb_list[] = {
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{ "QUANTUM FIREBALLlct10 05" , "A03.0900" },
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{ "QUANTUM FIREBALLlct20 30" , "APL.0900" },
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{ "TSSTcorp CDDVDW SH-S202J" , "SB00" },
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{ "TSSTcorp CDDVDW SH-S202J" , "SB01" },
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{ "TSSTcorp CDDVDW SH-S202N" , "SB00" },
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{ "TSSTcorp CDDVDW SH-S202N" , "SB01" },
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{ "TSSTcorp CDDVDW SH-S202H" , "SB00" },
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{ "TSSTcorp CDDVDW SH-S202H" , "SB01" },
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{ "SAMSUNG SP0822N" , "WA100-10" },
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{ NULL , NULL }
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};
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/*
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* All hosts that use the 80c ribbon must use!
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* The name is derived from upper byte of word 93 and the 80c ribbon.
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*/
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u8 eighty_ninty_three(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = drive->hwif;
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u16 *id = drive->id;
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int ivb = ide_in_drive_list(id, ivb_list);
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if (hwif->cbl == ATA_CBL_SATA || hwif->cbl == ATA_CBL_PATA40_SHORT)
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return 1;
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if (ivb)
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printk(KERN_DEBUG "%s: skipping word 93 validity check\n",
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drive->name);
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if (ata_id_is_sata(id) && !ivb)
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return 1;
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if (hwif->cbl != ATA_CBL_PATA80 && !ivb)
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goto no_80w;
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/*
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* FIXME:
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* - change master/slave IDENTIFY order
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* - force bit13 (80c cable present) check also for !ivb devices
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* (unless the slave device is pre-ATA3)
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*/
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if (id[ATA_ID_HW_CONFIG] & 0x4000)
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return 1;
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if (ivb) {
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const char *model = (char *)&id[ATA_ID_PROD];
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if (strstr(model, "TSSTcorp CDDVDW SH-S202")) {
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/*
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* These ATAPI devices always report 80c cable
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* so we have to depend on the host in this case.
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*/
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if (hwif->cbl == ATA_CBL_PATA80)
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return 1;
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} else {
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/* Depend on the device side cable detection. */
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if (id[ATA_ID_HW_CONFIG] & 0x2000)
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return 1;
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}
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}
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no_80w:
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if (drive->dev_flags & IDE_DFLAG_UDMA33_WARNED)
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return 0;
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printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
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"limiting max speed to UDMA33\n",
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drive->name,
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hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
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drive->dev_flags |= IDE_DFLAG_UDMA33_WARNED;
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return 0;
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}
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static const char *nien_quirk_list[] = {
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"QUANTUM FIREBALLlct08 08",
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"QUANTUM FIREBALLP KA6.4",
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"QUANTUM FIREBALLP KA9.1",
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"QUANTUM FIREBALLP KX13.6",
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"QUANTUM FIREBALLP KX20.5",
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"QUANTUM FIREBALLP KX27.3",
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"QUANTUM FIREBALLP LM20.4",
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"QUANTUM FIREBALLP LM20.5",
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"FUJITSU MHZ2160BH G2",
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NULL
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};
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void ide_check_nien_quirk_list(ide_drive_t *drive)
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{
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const char **list, *m = (char *)&drive->id[ATA_ID_PROD];
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for (list = nien_quirk_list; *list != NULL; list++)
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if (strstr(m, *list) != NULL) {
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drive->dev_flags |= IDE_DFLAG_NIEN_QUIRK;
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return;
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}
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}
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int ide_driveid_update(ide_drive_t *drive)
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{
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u16 *id;
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int rc;
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id = kmalloc(SECTOR_SIZE, GFP_ATOMIC);
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if (id == NULL)
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return 0;
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SELECT_MASK(drive, 1);
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rc = ide_dev_read_id(drive, ATA_CMD_ID_ATA, id, 1);
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SELECT_MASK(drive, 0);
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if (rc)
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goto out_err;
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drive->id[ATA_ID_UDMA_MODES] = id[ATA_ID_UDMA_MODES];
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drive->id[ATA_ID_MWDMA_MODES] = id[ATA_ID_MWDMA_MODES];
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drive->id[ATA_ID_SWDMA_MODES] = id[ATA_ID_SWDMA_MODES];
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drive->id[ATA_ID_CFA_MODES] = id[ATA_ID_CFA_MODES];
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/* anything more ? */
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kfree(id);
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return 1;
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out_err:
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if (rc == 2)
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printk(KERN_ERR "%s: %s: bad status\n", drive->name, __func__);
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kfree(id);
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return 0;
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}
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int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
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{
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ide_hwif_t *hwif = drive->hwif;
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const struct ide_tp_ops *tp_ops = hwif->tp_ops;
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struct ide_taskfile tf;
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u16 *id = drive->id, i;
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int error = 0;
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u8 stat;
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#ifdef CONFIG_BLK_DEV_IDEDMA
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if (hwif->dma_ops) /* check if host supports DMA */
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hwif->dma_ops->dma_host_set(drive, 0);
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#endif
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/* Skip setting PIO flow-control modes on pre-EIDE drives */
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if ((speed & 0xf8) == XFER_PIO_0 && ata_id_has_iordy(drive->id) == 0)
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goto skip;
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/*
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* Don't use ide_wait_cmd here - it will
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* attempt to set_geometry and recalibrate,
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* but for some reason these don't work at
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* this point (lost interrupt).
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*/
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udelay(1);
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tp_ops->dev_select(drive);
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SELECT_MASK(drive, 1);
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udelay(1);
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tp_ops->write_devctl(hwif, ATA_NIEN | ATA_DEVCTL_OBS);
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memset(&tf, 0, sizeof(tf));
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tf.feature = SETFEATURES_XFER;
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tf.nsect = speed;
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tp_ops->tf_load(drive, &tf, IDE_VALID_FEATURE | IDE_VALID_NSECT);
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tp_ops->exec_command(hwif, ATA_CMD_SET_FEATURES);
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if (drive->dev_flags & IDE_DFLAG_NIEN_QUIRK)
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tp_ops->write_devctl(hwif, ATA_DEVCTL_OBS);
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error = __ide_wait_stat(drive, drive->ready_stat,
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ATA_BUSY | ATA_DRQ | ATA_ERR,
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WAIT_CMD, &stat);
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SELECT_MASK(drive, 0);
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if (error) {
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(void) ide_dump_status(drive, "set_drive_speed_status", stat);
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return error;
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}
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if (speed >= XFER_SW_DMA_0) {
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id[ATA_ID_UDMA_MODES] &= ~0xFF00;
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id[ATA_ID_MWDMA_MODES] &= ~0x0700;
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id[ATA_ID_SWDMA_MODES] &= ~0x0700;
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if (ata_id_is_cfa(id))
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id[ATA_ID_CFA_MODES] &= ~0x0E00;
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} else if (ata_id_is_cfa(id))
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id[ATA_ID_CFA_MODES] &= ~0x01C0;
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skip:
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#ifdef CONFIG_BLK_DEV_IDEDMA
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if (speed >= XFER_SW_DMA_0 && (drive->dev_flags & IDE_DFLAG_USING_DMA))
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hwif->dma_ops->dma_host_set(drive, 1);
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else if (hwif->dma_ops) /* check if host supports DMA */
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ide_dma_off_quietly(drive);
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#endif
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if (speed >= XFER_UDMA_0) {
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i = 1 << (speed - XFER_UDMA_0);
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id[ATA_ID_UDMA_MODES] |= (i << 8 | i);
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} else if (ata_id_is_cfa(id) && speed >= XFER_MW_DMA_3) {
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i = speed - XFER_MW_DMA_2;
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id[ATA_ID_CFA_MODES] |= i << 9;
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} else if (speed >= XFER_MW_DMA_0) {
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i = 1 << (speed - XFER_MW_DMA_0);
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id[ATA_ID_MWDMA_MODES] |= (i << 8 | i);
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} else if (speed >= XFER_SW_DMA_0) {
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i = 1 << (speed - XFER_SW_DMA_0);
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id[ATA_ID_SWDMA_MODES] |= (i << 8 | i);
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} else if (ata_id_is_cfa(id) && speed >= XFER_PIO_5) {
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i = speed - XFER_PIO_4;
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id[ATA_ID_CFA_MODES] |= i << 6;
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}
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if (!drive->init_speed)
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drive->init_speed = speed;
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drive->current_speed = speed;
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return error;
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}
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/*
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* This should get invoked any time we exit the driver to
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* wait for an interrupt response from a drive. handler() points
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* at the appropriate code to handle the next interrupt, and a
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* timer is started to prevent us from waiting forever in case
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* something goes wrong (see the ide_timer_expiry() handler later on).
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*
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* See also ide_execute_command
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*/
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void __ide_set_handler(ide_drive_t *drive, ide_handler_t *handler,
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unsigned int timeout)
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{
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ide_hwif_t *hwif = drive->hwif;
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BUG_ON(hwif->handler);
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hwif->handler = handler;
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hwif->timer.expires = jiffies + timeout;
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hwif->req_gen_timer = hwif->req_gen;
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add_timer(&hwif->timer);
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}
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void ide_set_handler(ide_drive_t *drive, ide_handler_t *handler,
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unsigned int timeout)
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{
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ide_hwif_t *hwif = drive->hwif;
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unsigned long flags;
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spin_lock_irqsave(&hwif->lock, flags);
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__ide_set_handler(drive, handler, timeout);
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spin_unlock_irqrestore(&hwif->lock, flags);
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}
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EXPORT_SYMBOL(ide_set_handler);
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/**
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* ide_execute_command - execute an IDE command
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* @drive: IDE drive to issue the command against
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* @cmd: command
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* @handler: handler for next phase
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* @timeout: timeout for command
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*
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* Helper function to issue an IDE command. This handles the
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* atomicity requirements, command timing and ensures that the
|
|
* handler and IRQ setup do not race. All IDE command kick off
|
|
* should go via this function or do equivalent locking.
|
|
*/
|
|
|
|
void ide_execute_command(ide_drive_t *drive, struct ide_cmd *cmd,
|
|
ide_handler_t *handler, unsigned timeout)
|
|
{
|
|
ide_hwif_t *hwif = drive->hwif;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&hwif->lock, flags);
|
|
if ((cmd->protocol != ATAPI_PROT_DMA &&
|
|
cmd->protocol != ATAPI_PROT_PIO) ||
|
|
(drive->atapi_flags & IDE_AFLAG_DRQ_INTERRUPT))
|
|
__ide_set_handler(drive, handler, timeout);
|
|
hwif->tp_ops->exec_command(hwif, cmd->tf.command);
|
|
/*
|
|
* Drive takes 400nS to respond, we must avoid the IRQ being
|
|
* serviced before that.
|
|
*
|
|
* FIXME: we could skip this delay with care on non shared devices
|
|
*/
|
|
ndelay(400);
|
|
spin_unlock_irqrestore(&hwif->lock, flags);
|
|
}
|
|
|
|
/*
|
|
* ide_wait_not_busy() waits for the currently selected device on the hwif
|
|
* to report a non-busy status, see comments in ide_probe_port().
|
|
*/
|
|
int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
|
|
{
|
|
u8 stat = 0;
|
|
|
|
while (timeout--) {
|
|
/*
|
|
* Turn this into a schedule() sleep once I'm sure
|
|
* about locking issues (2.5 work ?).
|
|
*/
|
|
mdelay(1);
|
|
stat = hwif->tp_ops->read_status(hwif);
|
|
if ((stat & ATA_BUSY) == 0)
|
|
return 0;
|
|
/*
|
|
* Assume a value of 0xff means nothing is connected to
|
|
* the interface and it doesn't implement the pull-down
|
|
* resistor on D7.
|
|
*/
|
|
if (stat == 0xff)
|
|
return -ENODEV;
|
|
touch_softlockup_watchdog();
|
|
touch_nmi_watchdog();
|
|
}
|
|
return -EBUSY;
|
|
}
|