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379bfd7134
Ether MAC is a DMA-capable device and so should have 'dev.dma_mask' and 'dev.coherent_dma_mask' fields set properly, to reflect 32-bit DMA addressing ability. Currently, the code works without DMA masks but as we would have to enable CONFIG_HIGHMEM to access the full board memory in the future, when support for NETIF_F_SG would be added to the 'sh_eth' driver as well, the correct DMA masks should start to matter... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
531 lines
16 KiB
C
531 lines
16 KiB
C
/*
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* Koelsch board support
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*
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* Copyright (C) 2013 Renesas Electronics Corporation
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* Copyright (C) 2013-2014 Renesas Solutions Corp.
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* Copyright (C) 2013 Magnus Damm
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* Copyright (C) 2014 Cogent Embedded, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/dma-mapping.h>
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#include <linux/gpio.h>
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/leds.h>
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#include <linux/mfd/tmio.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/sh_mobile_sdhi.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/phy.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/platform_data/gpio-rcar.h>
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#include <linux/platform_data/rcar-du.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/fixed.h>
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#include <linux/regulator/gpio-regulator.h>
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#include <linux/regulator/machine.h>
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#include <linux/sh_eth.h>
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#include <linux/spi/flash.h>
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#include <linux/spi/rspi.h>
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#include <linux/spi/spi.h>
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#include <mach/common.h>
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#include <mach/irqs.h>
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#include <mach/r8a7791.h>
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#include <mach/rcar-gen2.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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/* DU */
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static struct rcar_du_encoder_data koelsch_du_encoders[] = {
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{
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.type = RCAR_DU_ENCODER_NONE,
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.output = RCAR_DU_OUTPUT_LVDS0,
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.connector.lvds.panel = {
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.width_mm = 210,
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.height_mm = 158,
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.mode = {
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.clock = 65000,
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.hdisplay = 1024,
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.hsync_start = 1048,
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.hsync_end = 1184,
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.htotal = 1344,
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.vdisplay = 768,
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.vsync_start = 771,
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.vsync_end = 777,
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.vtotal = 806,
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.flags = 0,
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},
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},
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},
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};
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static const struct rcar_du_platform_data koelsch_du_pdata __initconst = {
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.encoders = koelsch_du_encoders,
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.num_encoders = ARRAY_SIZE(koelsch_du_encoders),
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};
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static const struct resource du_resources[] __initconst = {
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DEFINE_RES_MEM(0xfeb00000, 0x40000),
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DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
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DEFINE_RES_IRQ(gic_spi(256)),
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DEFINE_RES_IRQ(gic_spi(268)),
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};
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static void __init koelsch_add_du_device(void)
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{
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struct platform_device_info info = {
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.name = "rcar-du-r8a7791",
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.id = -1,
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.res = du_resources,
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.num_res = ARRAY_SIZE(du_resources),
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.data = &koelsch_du_pdata,
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.size_data = sizeof(koelsch_du_pdata),
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.dma_mask = DMA_BIT_MASK(32),
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};
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platform_device_register_full(&info);
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}
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/* Ether */
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static const struct sh_eth_plat_data ether_pdata __initconst = {
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.phy = 0x1,
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.phy_irq = irq_pin(0),
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.edmac_endian = EDMAC_LITTLE_ENDIAN,
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.phy_interface = PHY_INTERFACE_MODE_RMII,
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.ether_link_active_low = 1,
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};
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static const struct resource ether_resources[] __initconst = {
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DEFINE_RES_MEM(0xee700000, 0x400),
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DEFINE_RES_IRQ(gic_spi(162)),
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};
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static const struct platform_device_info ether_info __initconst = {
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.parent = &platform_bus,
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.name = "r8a7791-ether",
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.id = -1,
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.res = ether_resources,
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.num_res = ARRAY_SIZE(ether_resources),
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.data = ðer_pdata,
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.size_data = sizeof(ether_pdata),
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.dma_mask = DMA_BIT_MASK(32),
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};
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/* LEDS */
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static struct gpio_led koelsch_leds[] = {
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{
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.name = "led8",
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.gpio = RCAR_GP_PIN(2, 21),
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.default_state = LEDS_GPIO_DEFSTATE_ON,
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}, {
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.name = "led7",
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.gpio = RCAR_GP_PIN(2, 20),
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.default_state = LEDS_GPIO_DEFSTATE_ON,
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}, {
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.name = "led6",
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.gpio = RCAR_GP_PIN(2, 19),
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.default_state = LEDS_GPIO_DEFSTATE_ON,
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},
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};
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static const struct gpio_led_platform_data koelsch_leds_pdata __initconst = {
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.leds = koelsch_leds,
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.num_leds = ARRAY_SIZE(koelsch_leds),
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};
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/* GPIO KEY */
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#define GPIO_KEY(c, g, d, ...) \
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{ .code = c, .gpio = g, .desc = d, .active_low = 1, \
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.wakeup = 1, .debounce_interval = 20 }
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static struct gpio_keys_button gpio_buttons[] = {
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GPIO_KEY(KEY_4, RCAR_GP_PIN(5, 3), "SW2-pin4"),
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GPIO_KEY(KEY_3, RCAR_GP_PIN(5, 2), "SW2-pin3"),
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GPIO_KEY(KEY_2, RCAR_GP_PIN(5, 1), "SW2-pin2"),
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GPIO_KEY(KEY_1, RCAR_GP_PIN(5, 0), "SW2-pin1"),
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GPIO_KEY(KEY_G, RCAR_GP_PIN(7, 6), "SW36"),
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GPIO_KEY(KEY_F, RCAR_GP_PIN(7, 5), "SW35"),
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GPIO_KEY(KEY_E, RCAR_GP_PIN(7, 4), "SW34"),
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GPIO_KEY(KEY_D, RCAR_GP_PIN(7, 3), "SW33"),
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GPIO_KEY(KEY_C, RCAR_GP_PIN(7, 2), "SW32"),
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GPIO_KEY(KEY_B, RCAR_GP_PIN(7, 1), "SW31"),
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GPIO_KEY(KEY_A, RCAR_GP_PIN(7, 0), "SW30"),
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};
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static const struct gpio_keys_platform_data koelsch_keys_pdata __initconst = {
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.buttons = gpio_buttons,
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.nbuttons = ARRAY_SIZE(gpio_buttons),
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};
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/* QSPI */
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static const struct resource qspi_resources[] __initconst = {
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DEFINE_RES_MEM(0xe6b10000, 0x1000),
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DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
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};
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static const struct rspi_plat_data qspi_pdata __initconst = {
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.num_chipselect = 1,
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};
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/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64 MiB) */
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static struct mtd_partition spi_flash_part[] = {
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{
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.name = "loader",
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.offset = 0x00000000,
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.size = 512 * 1024,
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "bootenv",
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.offset = MTDPART_OFS_APPEND,
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.size = 512 * 1024,
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "data",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static const struct flash_platform_data spi_flash_data = {
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.name = "m25p80",
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.parts = spi_flash_part,
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.nr_parts = ARRAY_SIZE(spi_flash_part),
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.type = "s25fl512s",
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};
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static const struct spi_board_info spi_info[] __initconst = {
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{
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.modalias = "m25p80",
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.platform_data = &spi_flash_data,
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.mode = SPI_MODE_0,
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.max_speed_hz = 30000000,
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.bus_num = 0,
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.chip_select = 0,
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},
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};
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/* SATA0 */
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static const struct resource sata0_resources[] __initconst = {
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DEFINE_RES_MEM(0xee300000, 0x2000),
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DEFINE_RES_IRQ(gic_spi(105)),
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};
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static const struct platform_device_info sata0_info __initconst = {
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.parent = &platform_bus,
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.name = "sata-r8a7791",
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.id = 0,
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.res = sata0_resources,
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.num_res = ARRAY_SIZE(sata0_resources),
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.dma_mask = DMA_BIT_MASK(32),
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};
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/* I2C */
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static const struct resource i2c_resources[] __initconst = {
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/* I2C0 */
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DEFINE_RES_MEM(0xE6508000, 0x40),
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DEFINE_RES_IRQ(gic_spi(287)),
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/* I2C1 */
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DEFINE_RES_MEM(0xE6518000, 0x40),
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DEFINE_RES_IRQ(gic_spi(288)),
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/* I2C2 */
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DEFINE_RES_MEM(0xE6530000, 0x40),
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DEFINE_RES_IRQ(gic_spi(286)),
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/* I2C3 */
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DEFINE_RES_MEM(0xE6540000, 0x40),
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DEFINE_RES_IRQ(gic_spi(290)),
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/* I2C4 */
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DEFINE_RES_MEM(0xE6520000, 0x40),
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DEFINE_RES_IRQ(gic_spi(19)),
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/* I2C5 */
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DEFINE_RES_MEM(0xE6528000, 0x40),
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DEFINE_RES_IRQ(gic_spi(20)),
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};
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static void __init koelsch_add_i2c(unsigned idx)
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{
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unsigned res_idx = idx * 2;
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BUG_ON(res_idx >= ARRAY_SIZE(i2c_resources));
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platform_device_register_simple("i2c-rcar_gen2", idx,
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i2c_resources + res_idx, 2);
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}
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#define SDHI_REGULATOR(idx, vdd_pin, vccq_pin) \
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static struct regulator_consumer_supply vcc_sdhi##idx##_consumer = \
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REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx); \
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\
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static struct regulator_init_data vcc_sdhi##idx##_init_data = { \
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.constraints = { \
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.valid_ops_mask = REGULATOR_CHANGE_STATUS, \
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}, \
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.consumer_supplies = &vcc_sdhi##idx##_consumer, \
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.num_consumer_supplies = 1, \
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}; \
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\
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static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
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.supply_name = "SDHI" #idx "Vcc", \
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.microvolts = 3300000, \
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.gpio = vdd_pin, \
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.enable_high = 1, \
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.init_data = &vcc_sdhi##idx##_init_data, \
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}; \
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\
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static struct regulator_consumer_supply vccq_sdhi##idx##_consumer = \
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REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx); \
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\
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static struct regulator_init_data vccq_sdhi##idx##_init_data = { \
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.constraints = { \
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.input_uV = 3300000, \
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.min_uV = 1800000, \
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.max_uV = 3300000, \
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \
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REGULATOR_CHANGE_STATUS, \
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}, \
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.consumer_supplies = &vccq_sdhi##idx##_consumer, \
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.num_consumer_supplies = 1, \
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}; \
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\
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static struct gpio vccq_sdhi##idx##_gpio = \
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{ vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx }; \
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\
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static struct gpio_regulator_state vccq_sdhi##idx##_states[] = { \
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{ .value = 1800000, .gpios = 0 }, \
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{ .value = 3300000, .gpios = 1 }, \
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}; \
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\
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static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
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.supply_name = "vqmmc", \
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.gpios = &vccq_sdhi##idx##_gpio, \
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.nr_gpios = 1, \
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.states = vccq_sdhi##idx##_states, \
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.nr_states = ARRAY_SIZE(vccq_sdhi##idx##_states), \
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.type = REGULATOR_VOLTAGE, \
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.init_data = &vccq_sdhi##idx##_init_data, \
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};
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SDHI_REGULATOR(0, RCAR_GP_PIN(7, 17), RCAR_GP_PIN(2, 12));
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SDHI_REGULATOR(1, RCAR_GP_PIN(7, 18), RCAR_GP_PIN(2, 13));
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SDHI_REGULATOR(2, RCAR_GP_PIN(7, 19), RCAR_GP_PIN(2, 26));
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/* SDHI0 */
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static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
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.tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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MMC_CAP_POWER_OFF_CARD,
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.tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
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};
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static struct resource sdhi0_resources[] __initdata = {
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DEFINE_RES_MEM(0xee100000, 0x200),
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DEFINE_RES_IRQ(gic_spi(165)),
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};
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/* SDHI1 */
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static struct sh_mobile_sdhi_info sdhi1_info __initdata = {
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.tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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MMC_CAP_POWER_OFF_CARD,
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.tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
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};
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static struct resource sdhi1_resources[] __initdata = {
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DEFINE_RES_MEM(0xee140000, 0x100),
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DEFINE_RES_IRQ(gic_spi(167)),
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};
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/* SDHI2 */
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static struct sh_mobile_sdhi_info sdhi2_info __initdata = {
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.tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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MMC_CAP_POWER_OFF_CARD,
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.tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
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TMIO_MMC_WRPROTECT_DISABLE,
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};
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static struct resource sdhi2_resources[] __initdata = {
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DEFINE_RES_MEM(0xee160000, 0x100),
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DEFINE_RES_IRQ(gic_spi(168)),
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};
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static const struct pinctrl_map koelsch_pinctrl_map[] = {
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/* DU */
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PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7791", "pfc-r8a7791",
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"du_rgb666", "du"),
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PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7791", "pfc-r8a7791",
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"du_sync", "du"),
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PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7791", "pfc-r8a7791",
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"du_clk_out_0", "du"),
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/* Ether */
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
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"eth_link", "eth"),
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
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"eth_mdio", "eth"),
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
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"eth_rmii", "eth"),
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
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"intc_irq0", "intc"),
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/* QSPI */
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PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791",
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"qspi_ctrl", "qspi"),
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PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791",
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"qspi_data4", "qspi"),
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/* SCIF0 (CN19: DEBUG SERIAL0) */
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PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7791",
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"scif0_data_d", "scif0"),
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/* SCIF1 (CN20: DEBUG SERIAL1) */
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PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7791",
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"scif1_data_d", "scif1"),
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/* I2C1 */
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PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar_gen2.1", "pfc-r8a7791",
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"i2c1_e", "i2c1"),
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/* I2C2 */
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PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar_gen2.2", "pfc-r8a7791",
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"i2c2", "i2c2"),
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/* I2C4 */
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PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar_gen2.4", "pfc-r8a7791",
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"i2c4_c", "i2c4"),
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/* SDHI0 */
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PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7791",
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"sdhi0_data4", "sdhi0"),
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PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7791",
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"sdhi0_ctrl", "sdhi0"),
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PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7791",
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"sdhi0_cd", "sdhi0"),
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PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7791",
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"sdhi0_wp", "sdhi0"),
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/* SDHI2 */
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PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7791",
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"sdhi1_data4", "sdhi1"),
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|
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7791",
|
|
"sdhi1_ctrl", "sdhi1"),
|
|
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7791",
|
|
"sdhi1_cd", "sdhi1"),
|
|
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7791",
|
|
"sdhi1_wp", "sdhi1"),
|
|
/* SDHI2 */
|
|
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7791",
|
|
"sdhi2_data4", "sdhi2"),
|
|
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7791",
|
|
"sdhi2_ctrl", "sdhi2"),
|
|
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7791",
|
|
"sdhi2_cd", "sdhi2"),
|
|
};
|
|
|
|
static void __init koelsch_add_standard_devices(void)
|
|
{
|
|
r8a7791_clock_init();
|
|
pinctrl_register_mappings(koelsch_pinctrl_map,
|
|
ARRAY_SIZE(koelsch_pinctrl_map));
|
|
r8a7791_pinmux_init();
|
|
r8a7791_add_standard_devices();
|
|
platform_device_register_full(ðer_info);
|
|
platform_device_register_data(&platform_bus, "leds-gpio", -1,
|
|
&koelsch_leds_pdata,
|
|
sizeof(koelsch_leds_pdata));
|
|
platform_device_register_data(&platform_bus, "gpio-keys", -1,
|
|
&koelsch_keys_pdata,
|
|
sizeof(koelsch_keys_pdata));
|
|
platform_device_register_resndata(&platform_bus, "qspi", 0,
|
|
qspi_resources,
|
|
ARRAY_SIZE(qspi_resources),
|
|
&qspi_pdata, sizeof(qspi_pdata));
|
|
spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
|
|
|
|
koelsch_add_du_device();
|
|
|
|
platform_device_register_full(&sata0_info);
|
|
|
|
koelsch_add_i2c(1);
|
|
koelsch_add_i2c(2);
|
|
koelsch_add_i2c(4);
|
|
koelsch_add_i2c(5);
|
|
|
|
platform_device_register_data(&platform_bus, "reg-fixed-voltage", 0,
|
|
&vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
|
|
platform_device_register_data(&platform_bus, "reg-fixed-voltage", 1,
|
|
&vcc_sdhi1_info, sizeof(struct fixed_voltage_config));
|
|
platform_device_register_data(&platform_bus, "reg-fixed-voltage", 2,
|
|
&vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
|
|
platform_device_register_data(&platform_bus, "gpio-regulator", 0,
|
|
&vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
|
|
platform_device_register_data(&platform_bus, "gpio-regulator", 1,
|
|
&vccq_sdhi1_info, sizeof(struct gpio_regulator_config));
|
|
platform_device_register_data(&platform_bus, "gpio-regulator", 2,
|
|
&vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
|
|
|
|
platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0,
|
|
sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
|
|
&sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
|
|
|
|
platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 1,
|
|
sdhi1_resources, ARRAY_SIZE(sdhi1_resources),
|
|
&sdhi1_info, sizeof(struct sh_mobile_sdhi_info));
|
|
|
|
platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 2,
|
|
sdhi2_resources, ARRAY_SIZE(sdhi2_resources),
|
|
&sdhi2_info, sizeof(struct sh_mobile_sdhi_info));
|
|
|
|
}
|
|
|
|
/*
|
|
* Ether LEDs on the Koelsch board are named LINK and ACTIVE which corresponds
|
|
* to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
|
|
* 14-15. We have to set them back to 01 from the default 00 value each time
|
|
* the PHY is reset. It's also important because the PHY's LED0 signal is
|
|
* connected to SoC's ETH_LINK signal and in the PHY's default mode it will
|
|
* bounce on and off after each packet, which we apparently want to avoid.
|
|
*/
|
|
static int koelsch_ksz8041_fixup(struct phy_device *phydev)
|
|
{
|
|
u16 phyctrl1 = phy_read(phydev, 0x1e);
|
|
|
|
phyctrl1 &= ~0xc000;
|
|
phyctrl1 |= 0x4000;
|
|
return phy_write(phydev, 0x1e, phyctrl1);
|
|
}
|
|
|
|
static void __init koelsch_init(void)
|
|
{
|
|
koelsch_add_standard_devices();
|
|
|
|
irq_set_irq_type(irq_pin(0), IRQ_TYPE_LEVEL_LOW);
|
|
|
|
if (IS_ENABLED(CONFIG_PHYLIB))
|
|
phy_register_fixup_for_id("r8a7791-ether-ff:01",
|
|
koelsch_ksz8041_fixup);
|
|
}
|
|
|
|
static const char * const koelsch_boards_compat_dt[] __initconst = {
|
|
"renesas,koelsch",
|
|
NULL,
|
|
};
|
|
|
|
DT_MACHINE_START(KOELSCH_DT, "koelsch")
|
|
.smp = smp_ops(r8a7791_smp_ops),
|
|
.init_early = r8a7791_init_early,
|
|
.init_time = rcar_gen2_timer_init,
|
|
.init_machine = koelsch_init,
|
|
.init_late = shmobile_init_late,
|
|
.dt_compat = koelsch_boards_compat_dt,
|
|
MACHINE_END
|